[RFC PATCH 11/40] drm/amd/display: add plane degamma TF driver-private property
Melissa Wen
mwen at igalia.com
Sun Apr 23 14:10:23 UTC 2023
From: Joshua Ashton <joshua at froggi.es>
Allow userspace to tell the kernel driver the input space and,
therefore, uses correct predefined transfer function (TF) to delinearize
content with or without LUT (using hardcoded curve caps).
Signed-off-by: Joshua Ashton <joshua at froggi.es>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 ++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 5 ++++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 7 +++++
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 28 +++++++++++++++++++
4 files changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 996c9c3fd471..24595906dab1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1317,6 +1317,15 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev)
return -ENOMEM;
adev->mode_info.plane_degamma_lut_size_property = prop;
+ prop = drm_property_create_enum(adev_to_drm(adev),
+ DRM_MODE_PROP_ENUM,
+ "AMD_PLANE_DEGAMMA_TF",
+ drm_transfer_function_enum_list,
+ ARRAY_SIZE(drm_transfer_function_enum_list));
+ if (!prop)
+ return -ENOMEM;
+ adev->mode_info.plane_degamma_tf_property = prop;
+
return 0;
}
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index d4e609a8b67e..ab9ce6f26c90 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -382,6 +382,11 @@ struct amdgpu_mode_info {
* size of degamma LUT as supported by the driver (read-only).
*/
struct drm_property *plane_degamma_lut_size_property;
+ /**
+ * @plane_degamma_tf_property: Predefined transfer function to
+ * linearize content with or without LUT.
+ */
+ struct drm_property *plane_degamma_tf_property;
#endif
};
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index b1d0c65d821d..005632c1c9ec 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -729,6 +729,13 @@ struct dm_plane_state {
* The blob (if not NULL) is an array of &struct drm_color_lut.
*/
struct drm_property_blob *degamma_lut;
+ /**
+ * @degamma_tf:
+ *
+ * Predefined transfer function to tell DC driver the input space to
+ * linearize.
+ */
+ enum drm_transfer_function degamma_tf;
#endif
};
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 7b9d62c70b30..5b458cc0781c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -1319,6 +1319,11 @@ static void dm_drm_plane_reset(struct drm_plane *plane)
if (amdgpu_state)
__drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);
+
+#ifdef CONFIG_STEAM_DECK
+ if (amdgpu_state)
+ amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT;
+#endif
}
static struct drm_plane_state *
@@ -1450,6 +1455,19 @@ amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev,
return 0;
}
+static const struct drm_prop_enum_list drm_transfer_function_enum_list[] = {
+ { DRM_TRANSFER_FUNCTION_DEFAULT, "Default" },
+ { DRM_TRANSFER_FUNCTION_SRGB, "sRGB" },
+ { DRM_TRANSFER_FUNCTION_BT709, "BT.709" },
+ { DRM_TRANSFER_FUNCTION_PQ, "PQ (Perceptual Quantizer)" },
+ { DRM_TRANSFER_FUNCTION_LINEAR, "Linear" },
+ { DRM_TRANSFER_FUNCTION_UNITY, "Unity" },
+ { DRM_TRANSFER_FUNCTION_HLG, "HLG (Hybrid Log Gamma)" },
+ { DRM_TRANSFER_FUNCTION_GAMMA22, "Gamma 2.2" },
+ { DRM_TRANSFER_FUNCTION_GAMMA24, "Gamma 2.4" },
+ { DRM_TRANSFER_FUNCTION_GAMMA26, "Gamma 2.6" },
+};
+
static void
dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
struct drm_plane *plane)
@@ -1460,6 +1478,9 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
drm_object_attach_property(&plane->base,
dm->adev->mode_info.plane_degamma_lut_size_property,
MAX_COLOR_LUT_ENTRIES);
+ drm_object_attach_property(&plane->base,
+ dm->adev->mode_info.plane_degamma_tf_property,
+ DRM_TRANSFER_FUNCTION_DEFAULT);
}
}
@@ -1481,6 +1502,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
&replaced);
dm_plane_state->base.color_mgmt_changed |= replaced;
return ret;
+ } else if (property == adev->mode_info.plane_degamma_tf_property) {
+ if (dm_plane_state->degamma_tf != val) {
+ dm_plane_state->degamma_tf = val;
+ dm_plane_state->base.color_mgmt_changed = 1;
+ }
} else {
drm_dbg_atomic(plane->dev,
"[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n",
@@ -1505,6 +1531,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
if (property == adev->mode_info.plane_degamma_lut_property) {
*val = (dm_plane_state->degamma_lut) ?
dm_plane_state->degamma_lut->base.id : 0;
+ } else if (property == adev->mode_info.plane_degamma_tf_property) {
+ *val = dm_plane_state->degamma_tf;
} else {
return -EINVAL;
}
--
2.39.2
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