[PATCH v3 10/21] drm/msm/dpu: Take INTF index as parameter in interrupt register defines
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Wed Apr 26 00:03:16 UTC 2023
On 26/04/2023 02:06, Marijn Suijten wrote:
> Instead of hardcoding many register defines for every INTF and AD4 index
> with a fixed stride, turn the defines into singular chunks of math that
> compute the address using the base and this fixed stride multiplied by
> the index given as argument to the definitions.
>
> MDP_SSPP_TOP0_OFF is dropped as that constant is zero anyway, and all
> register offsets related to it live in dpu_hwio.h.
>
> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> Signed-off-by: Marijn Suijten <marijn.suijten at somainline.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 156 ++++++++++------------
> 1 file changed, 72 insertions(+), 84 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
--
With best wishes
Dmitry
More information about the dri-devel
mailing list