[PATCH v2, 3/3] drm/mediatek: dsi: Add dsi cmdq_ctl to send panel initial code
Shuijing Li (李水静)
Shuijing.Li at mediatek.com
Mon Aug 14 08:47:41 UTC 2023
Hi CK,
Gentle ping for this patch, if there is anything I need to modify,
please kindly let me know.
Thanks.
On Mon, 2023-06-19 at 17:20 +0200, Matthias Brugger wrote:
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On 16/06/2023 09:36, Shuijing Li wrote:
> For mt8188, add dsi cmdq reg control to send long packets to panel
> initialization.
>
> Signed-off-by: Shuijing Li <shuijing.li at mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi at mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg at gmail.com>
> ---
> Changes in v2:
> use mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); directly,
> per suggestion from the previous thread:
> https://lore.kernel.org/lkml/015f4c60-ed77-9e1f-8a6b-cda6e4f6ac93@gmail.com/
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 500a3054282d..8b43d9f48178 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -86,6 +86,7 @@
>
> #define DSI_CMDQ_SIZE0x60
> #define CMDQ_SIZE0x3f
> +#define CMDQ_SIZE_SELBIT(15)
>
> #define DSI_HSTX_CKL_WC0x64
>
> @@ -178,6 +179,7 @@ struct mtk_dsi_driver_data {
> const u32 reg_cmdq_off;
> bool has_shadow_ctl;
> bool has_size_ctl;
> +bool cmdq_long_packet_ctl;
> };
>
> struct mtk_dsi {
> @@ -996,6 +998,8 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
>
> mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val);
> mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size);
> +if (dsi->driver_data->cmdq_long_packet_ctl)
> +mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL);
> }
>
> static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi,
> @@ -1200,18 +1204,21 @@ static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = {
> .reg_cmdq_off = 0x200,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> +.cmdq_long_packet_ctl = false,
> };
>
> static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
> .reg_cmdq_off = 0xd00,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> +.cmdq_long_packet_ctl = false,
> };
>
> static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = {
> .reg_cmdq_off = 0xd00,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> +.cmdq_long_packet_ctl = true,
> };
>
> static const struct of_device_id mtk_dsi_of_match[] = {
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