[PATCH v3 5/7] drm/bridge: tc358767: Add more volatile registers

[Robert Foss]

On Tue, Dec 12, 2023 at 8:53 AM Alexander Stein
<alexander.stein at ew.tq-group.com> wrote:
>
> These registers might change their value without any host write operation.
>
> Signed-off-by: Alexander Stein <alexander.stein at ew.tq-group.com>
> ---
>  drivers/gpu/drm/bridge/tc358767.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
> index 61d8710f46293..152a6dc916079 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -2049,9 +2049,16 @@ static bool tc_readable_reg(struct device *dev, unsigned int reg)
>  }
>
>  static const struct regmap_range tc_volatile_ranges[] = {
> +       regmap_reg_range(PPI_BUSYPPI, PPI_BUSYPPI),
> +       regmap_reg_range(DSI_BUSYDSI, DSI_BUSYDSI),
> +       regmap_reg_range(DSI_LANESTATUS0, DSI_INTSTATUS),
> +       regmap_reg_range(DSIERRCNT, DSIERRCNT),
>         regmap_reg_range(VFUEN0, VFUEN0),
> +       regmap_reg_range(SYSSTAT, SYSSTAT),
>         regmap_reg_range(GPIOI, GPIOI),
>         regmap_reg_range(INTSTS_G, INTSTS_G),
> +       regmap_reg_range(DP0_VMNGENSTATUS, DP0_VMNGENSTATUS),
> +       regmap_reg_range(DP0_AMNGENSTATUS, DP0_AMNGENSTATUS),
>         regmap_reg_range(DP0_AUXWDATA(0), DP0_AUXSTATUS),
>         regmap_reg_range(DP0_LTSTAT, DP0_SNKLTCHGREQ),
>         regmap_reg_range(DP_PHY_CTRL, DP_PHY_CTRL),
> --
> 2.34.1
>


Reviewed-by: Robert Foss <rfoss at kernel.org>