[PATCH v3 19/27] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly

[Abhinav Kumar]

On 2/3/2023 10:21 AM, Dmitry Baryshkov wrote:
> Rework bandwidth/clock calculation functions to use mode directly rather
> than fetching it through the plane data.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>

Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 39 ++++++++++-------------
>   1 file changed, 17 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index ee261a591d45..09a3fde1c910 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -127,20 +127,19 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
>   
>   /**
>    * _dpu_plane_calc_bw - calculate bandwidth required for a plane
> - * @plane: Pointer to drm plane.
> + * @catalog: Points to dpu catalog structure
>    * @fmt: Pointer to source buffer format
> + * @mode: Pointer to drm display mode
>    * @pipe_cfg: Pointer to pipe configuration
>    * Result: Updates calculated bandwidth in the plane state.
>    * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
>    * Prefill BW Equation: line src bytes * line_time
>    */
> -static void _dpu_plane_calc_bw(struct drm_plane *plane,
> +static u64 _dpu_plane_calc_bw(const struct dpu_mdss_cfg *catalog,
>   	const struct dpu_format *fmt,
> +	const struct drm_display_mode *mode,
>   	struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
> -	struct dpu_plane_state *pstate;
> -	struct drm_display_mode *mode;
> -	struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
>   	int src_width, src_height, dst_height, fps;
>   	u64 plane_prefill_bw;
>   	u64 plane_bw;
> @@ -148,9 +147,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
>   	u64 scale_factor;
>   	int vbp, vpw, vfp;
>   
> -	pstate = to_dpu_plane_state(plane->state);
> -	mode = &plane->state->crtc->mode;
> -
>   	src_width = drm_rect_width(&pipe_cfg->src_rect);
>   	src_height = drm_rect_height(&pipe_cfg->src_rect);
>   	dst_height = drm_rect_height(&pipe_cfg->dst_rect);
> @@ -158,7 +154,7 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
>   	vbp = mode->vtotal - mode->vsync_end;
>   	vpw = mode->vsync_end - mode->vsync_start;
>   	vfp = mode->vsync_start - mode->vdisplay;
> -	hw_latency_lines =  dpu_kms->catalog->perf->min_prefill_lines;
> +	hw_latency_lines =  catalog->perf->min_prefill_lines;
>   	scale_factor = src_height > dst_height ?
>   		mult_frac(src_height, 1, dst_height) : 1;
>   
> @@ -178,37 +174,36 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
>   		do_div(plane_prefill_bw, hw_latency_lines);
>   
>   
> -	pstate->plane_fetch_bw = max(plane_bw, plane_prefill_bw);
> +	return max(plane_bw, plane_prefill_bw);
>   }
>   
>   /**
>    * _dpu_plane_calc_clk - calculate clock required for a plane
> - * @plane: Pointer to drm plane.
> + * @mode: Pointer to drm display mode
>    * @pipe_cfg: Pointer to pipe configuration
>    * Result: Updates calculated clock in the plane state.
>    * Clock equation: dst_w * v_total * fps * (src_h / dst_h)
>    */
> -static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_hw_sspp_cfg *pipe_cfg)
> +static u64 _dpu_plane_calc_clk(const struct drm_display_mode *mode,
> +		struct dpu_hw_sspp_cfg *pipe_cfg)
>   {
> -	struct dpu_plane_state *pstate;
> -	struct drm_display_mode *mode;
>   	int dst_width, src_height, dst_height, fps;
> -
> -	pstate = to_dpu_plane_state(plane->state);
> -	mode = &plane->state->crtc->mode;
> +	u64 plane_clk;
>   
>   	src_height = drm_rect_height(&pipe_cfg->src_rect);
>   	dst_width = drm_rect_width(&pipe_cfg->dst_rect);
>   	dst_height = drm_rect_height(&pipe_cfg->dst_rect);
>   	fps = drm_mode_vrefresh(mode);
>   
> -	pstate->plane_clk =
> +	plane_clk =
>   		dst_width * mode->vtotal * fps;
>   
>   	if (src_height > dst_height) {
> -		pstate->plane_clk *= src_height;
> -		do_div(pstate->plane_clk, dst_height);
> +		plane_clk *= src_height;
> +		do_div(plane_clk, dst_height);
>   	}
> +
> +	return plane_clk;
>   }
>   
>   /**
> @@ -1219,9 +1214,9 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
>   		_dpu_plane_set_qos_remap(plane, pipe);
>   	}
>   
> -	_dpu_plane_calc_bw(plane, fmt, &pipe_cfg);
> +	pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, &crtc->mode, &pipe_cfg);
>   
> -	_dpu_plane_calc_clk(plane, &pipe_cfg);
> +	pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pipe_cfg);
>   }
>   
>   static void _dpu_plane_atomic_disable(struct drm_plane *plane)