[PATCH] amd/dcn20: Fix high mem clock with multiple displays

Alex Deucher alexdeucher at gmail.com
Wed Jan 18 14:46:32 UTC 2023


On Wed, Jan 18, 2023 at 5:43 AM Nicu Borta <nicuborta123 at gmail.com> wrote:
>
> On RX5000 series GPUs, using a high refresh rate monitor causes the VRAM to
> always stay at the highest clock (according to AMD, this is done to prevent
> flickering).
>
> However, when using 2 monitors (e.g. one at 165Hz and another at 60Hz), then
> disconnecting the high refresh monitor, before this patch the VRAM clock didn't
> decrease like it should.
>
> This patch fixes that bug, and now, when disconnecting the high refresh rate
> monitor, the VRAM clock jumps to the minimum.
>
> Tested for a few months, I haven't noticed any visual artifacts or other errors
> (RX5700XT).
>

This has been enabled and disabled several times in the past due to
stability issues with multiple monitors reported by a number of users.
Please see commit:

commit bcfab8e35ce81e2fd3230c1575024bfde0d28c8b
Author: Alex Deucher <alexander.deucher at amd.com>
Date:   Thu Feb 3 10:04:58 2022 -0500

    drm/amdgpu/display: change pipe policy for DCN 2.0

    Fixes hangs on driver load with multiple displays on
    DCN 2.0 parts.

    Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215511
    Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1877
    Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1886
    Fixes: ee2698cf79cc ("drm/amd/display: Changed pipe split policy
to allow for multi-display pipe split")
    Reviewed-by: Harry Wentland <harry.wentland at amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

I would suggest following up on those bug reports to see if those
users are still experiencing stability issues when changing this.

Alex

> Signed-off-by: Nicu Borta <nicuborta123 at gmail.com>
> ---
>  drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> index 8a0dd0d7134b..481a15b02126 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> @@ -714,7 +714,7 @@ static const struct dc_debug_options debug_defaults_drv = {
>                 .timing_trace = false,
>                 .clock_trace = true,
>                 .disable_pplib_clock_request = true,
> -               .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
> +               .pipe_split_policy = MPC_SPLIT_DYNAMIC,
>                 .force_single_disp_pipe_split = false,
>                 .disable_dcc = DCC_ENABLE,
>                 .vsr_support = true,
> --
> 2.38.2
>


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