[PATCH v2 7/7] drm: rcar-du: Stop accessing non-existant registers on gen4

Tomi Valkeinen tomi.valkeinen+renesas at ideasonboard.com
Fri Jan 20 16:28:56 UTC 2023


On 20/01/2023 18:21, Laurent Pinchart wrote:
> On Fri, Jan 20, 2023 at 10:50:09AM +0200, Tomi Valkeinen wrote:
>> The following registers do not exist on gen4, so we should not write
>> them: DEF6Rm, DEF7Rm, DEF8Rm, ESCRn, OTARn.
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas at ideasonboard.com>
>> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas at ideasonboard.com>
>> ---
>>   drivers/gpu/drm/rcar-du/rcar_du_crtc.c  |  8 +++++---
>>   drivers/gpu/drm/rcar-du/rcar_du_group.c | 11 ++++++++---
>>   2 files changed, 13 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
>> index b7dd59fe119e..008e172ed43b 100644
>> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
>> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
>> @@ -298,10 +298,12 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
>>   		escr = params.escr;
>>   	}
>>   
>> -	dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);
>> +	if (rcdu->info->gen < 4) {
>> +		dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);
>>   
>> -	rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);
>> -	rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);
>> +		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);
>> +		rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);
>> +	}
>>   
>>   	/* Signal polarities */
>>   	dsmr = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)
>> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
>> index 6da01760ede5..c2209d427bb7 100644
>> --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
>> +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
>> @@ -148,7 +148,8 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
>>   	}
>>   	rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
>>   
>> -	rcar_du_group_setup_pins(rgrp);
>> +	if (rcdu->info->gen < 4)
>> +		rcar_du_group_setup_pins(rgrp);
>>   
>>   	/*
>>   	 * TODO: Handle routing of the DU output to CMM dynamically, as we
>> @@ -160,7 +161,8 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
>>   	rcar_du_group_write(rgrp, DEFR7, defr7);
>>   
>>   	if (rcdu->info->gen >= 2) {
>> -		rcar_du_group_setup_defr8(rgrp);
>> +		if (rcdu->info->gen < 4)
>> +			rcar_du_group_setup_defr8(rgrp);
>>   		rcar_du_group_setup_didsr(rgrp);
>>   	}
>>   
>> @@ -192,10 +194,13 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
>>    */
>>   int rcar_du_group_get(struct rcar_du_group *rgrp)
>>   {
>> +	struct rcar_du_device *rcdu = rgrp->dev;
>> +
>>   	if (rgrp->use_count)
>>   		goto done;
>>   
>> -	rcar_du_group_setup(rgrp);
>> +	if (rcdu->info->gen < 4)
>> +		rcar_du_group_setup(rgrp);
> 
> This doesn't look right, you're disabling way more than necessary.

You're right, doesn't look even remotely correct. A morning patch, 
obviously.

  Tomi



More information about the dri-devel mailing list