[PATCH] Revert "drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+"

[Aurabindo Pillai]

On 7/2/23 12:44, Guilherme G. Piccoli wrote:
> This reverts commit 06c3a652a787efc960af7c8816036d25c4227c6c.
> 
> After this commit, the Steam Deck cannot boot with graphics anymore;
> the following message is observed on dmesg:
> 
> "[drm] ERROR [CRTC:67:crtc-0] flip_done timed out"
> 
> No other error is observed, it just stays like that. After bisecting
> amd-staging-drm-next, we narrowed it down to this commit. Seems it
> makes sense to revert it to have the tree bootable until a proper
> solution is worked.
> 
> Cc: Aurabindo Pillai <aurabindo.pillai at amd.com>
> Cc: André Almeida <andrealmeid at igalia.com>
> Cc: Melissa Wen <mwen at igalia.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
> Signed-off-by: Guilherme G. Piccoli <gpiccoli at igalia.com>
> 
> ---
> 
> Hi Alex / Aurabindo, we couldn't boot the Deck with in HEAD
> (amd-staging-drm-next), git bisect led to this commit. Since its
> description already mentions a potential proper solution, related
> to the DMCUB (and some complex state tracking), I thought it was
> more effective to revert it to allow booting the tree in Deck (and
> maybe other HW - I just tested the Deck BTW).
> Lemme know your thoughts.
> 
> Special thanks to André and Melissa for helping the debug / bisect!
> We're open to test alternative patches, feel free to ping.
> Cheers,
> 
> Guilherme
> 
> 
>  drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 15 ++++++++++++---
>  drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 10 ----------
>  2 files changed, 12 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> index 0e8f4f36c87c..27419cd98264 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> @@ -945,10 +945,19 @@ void optc1_set_drr(
>  				OTG_FORCE_LOCK_ON_EVENT, 0,
>  				OTG_SET_V_TOTAL_MIN_MASK_EN, 0,
>  				OTG_SET_V_TOTAL_MIN_MASK, 0);
> -	}
>  
> -	// Setup manual flow control for EOF via TRIG_A
> -	optc->funcs->setup_manual_trigger(optc);
> +		// Setup manual flow control for EOF via TRIG_A
> +		optc->funcs->setup_manual_trigger(optc);
> +
> +	} else {
> +		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
> +				OTG_SET_V_TOTAL_MIN_MASK, 0,
> +				OTG_V_TOTAL_MIN_SEL, 0,
> +				OTG_V_TOTAL_MAX_SEL, 0,
> +				OTG_FORCE_LOCK_ON_EVENT, 0);
> +
> +		optc->funcs->set_vtotal_min_max(optc, 0, 0);
> +	}
>  }
>  
>  void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> index 58bdbd859bf9..d6f095b4555d 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> @@ -462,16 +462,6 @@ void optc2_setup_manual_trigger(struct timing_generator *optc)
>  {
>  	struct optc *optc1 = DCN10TG_FROM_TG(optc);
>  
> -	/* Set the min/max selectors unconditionally so that
> -	 * DMCUB fw may change OTG timings when necessary
> -	 * TODO: Remove the w/a after fixing the issue in DMCUB firmware
> -	 */
> -	REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
> -				 OTG_V_TOTAL_MIN_SEL, 1,
> -				 OTG_V_TOTAL_MAX_SEL, 1,
> -				 OTG_FORCE_LOCK_ON_EVENT, 0,
> -				 OTG_SET_V_TOTAL_MIN_MASK, (1 << 1)); /* TRIGA */
> -
>  	REG_SET_8(OTG_TRIGA_CNTL, 0,
>  			OTG_TRIGA_SOURCE_SELECT, 21,
>  			OTG_TRIGA_SOURCE_PIPE_SELECT, optc->inst,


Hi,

Sorry for the delayed response, this patch went unnoticed. This revert would break asics. Could you try the attached patch without reverting this one ?
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