[PATCH v2 0/8] MDSS reg bus interconnect
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Wed Jul 12 12:11:37 UTC 2023
Per agreement with Konrad, picked up this patch series.
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's
another path that needs to be handled to ensure MDSS functions properly,
namely the "reg bus", a.k.a the CPU-MDSS interconnect.
Gating that path may have a variety of effects. from none to otherwise
inexplicable DSI timeouts.
This series tries to address the lack of that.
Changes since v1:
- Dropped the DPU part, the MDSS vote seems to be enough
- Reworked MDSS voting patch. Replaced static bw value with the
per-platform confgurable values.
- Added sm8450 DT patch.
Dmitry Baryshkov (6):
drm/msm/mdss: correct UBWC programming for SM8550
drm/msm/mdss: switch mdss to use devm_of_icc_get()
drm/msm/mdss: inline msm_mdss_icc_request_bw()
drm/msm/mdss: populate missing data
drm/msm/mdss: Handle the reg bus ICC path
arm64: dts: qcom: sm8450: provide MDSS cfg interconnect
Konrad Dybcio (2):
dt-bindings: display/msm: Add reg bus and rotator interconnects
drm/msm/mdss: Rename path references to mdp_path
.../bindings/display/msm/mdss-common.yaml | 2 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 9 +-
drivers/gpu/drm/msm/msm_mdss.c | 138 +++++++++++++-----
3 files changed, 108 insertions(+), 41 deletions(-)
--
2.40.1
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