[PATCH 2/2] drm/amdgpu: Add FW shared flag for DRM KEY INJECT

Gopalakrishnan, Veerabadhran (Veera) Veerabadhran.Gopalakrishnan at amd.com
Fri Jul 14 10:02:25 UTC 2023


[AMD Official Use Only - General]

Suresh,
Please modify the commit message to a more meaningful one.
1. add a commit title
2. write about the changes than the effect of the change.
Something like Enabling FW workaround in using shared memory for VCN 4
3. Can you please check if this change is applicable for VCN_4.0.3 as well?
The same changes may need to go in vcn_v4_0_3.c as well.

Thanks & Regards,
Veera


-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of sguttula
Sent: Friday, July 14, 2023 3:16 PM
To: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Liu, Leo <Leo.Liu at amd.com>
Cc: dri-devel at lists.freedesktop.org; amd-gfx at lists.freedesktop.org; Guttula, Suresh <Suresh.Guttula at amd.com>
Subject: [PATCH 2/2] drm/amdgpu: Add FW shared flag for DRM KEY INJECT

This patch will fix the secure playback corruption due to HW bug on VCN4.

Signed-off-by: sguttula <Suresh.Guttula at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 9 +++++++++
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c   | 4 ++++
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index 1f1d7dc94f90..a3eed90b6af0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -161,6 +161,7 @@
        } while (0)

 #define AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE (1 << 2)
+#define AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT (1 << 4)
 #define AMDGPU_VCN_FW_SHARED_FLAG_0_RB (1 << 6)
 #define AMDGPU_VCN_MULTI_QUEUE_FLAG    (1 << 8)
 #define AMDGPU_VCN_SW_RING_FLAG                (1 << 9)
@@ -180,6 +181,8 @@
 #define AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU (0)  #define AMDGPU_VCN_SMU_DPM_INTERFACE_APU (1)

+#define AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING 2
+
 enum fw_queue_mode {
        FW_QUEUE_RING_RESET = 1,
        FW_QUEUE_DPG_HOLD_OFF = 2,
@@ -343,6 +346,11 @@ struct amdgpu_fw_shared_rb_setup {
        uint32_t  reserved[6];
 };

+struct amdgpu_fw_shared_drm_key_wa {
+       uint8_t  method;
+       uint8_t  reserved[3];
+};
+
 struct amdgpu_vcn4_fw_shared {
        uint32_t present_flag_0;
        uint8_t pad[12];
@@ -352,6 +360,7 @@ struct amdgpu_vcn4_fw_shared {
        uint8_t pad2[20];
        struct amdgpu_fw_shared_rb_setup rb_setup;
        struct amdgpu_fw_shared_smu_interface_info smu_dpm_interface;
+       struct amdgpu_fw_shared_drm_key_wa drm_key_wa;
 };

 struct amdgpu_vcn_fwlog {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index d199f87febd1..9f32c9f73941 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -169,6 +169,10 @@ static int vcn_v4_0_sw_init(void *handle)
                fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ?
                        AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU;

+               fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT;
+               fw_shared->drm_key_wa.method =
+                       AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING;
+
                if (amdgpu_sriov_vf(adev))
                        fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG);

--
2.25.1



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