[PATCH v3 0/5] Update AUX invalidation sequence
Andi Shyti
andi.shyti at linux.intel.com
Mon Jul 17 12:51:29 UTC 2023
Hi,
as there are new hardware directives, we need a little adaptation
for the AUX invalidation sequence.
In this version we support all the engines affected by this
change.
The stable backport has some challenges because the original
patch that this series fixes has had more changes in between.
Thanks a lot Nirmoy for your review and for the fruitful discussions!
Thanks,
Andi
Changelog:
=========
v2 -> v3
- added r-b from Nirmoy in patch 1 and 4.
- added patch 3 which enables the ccs_flush in the control pipe for mtl+
compute and render engines.
- added redundant checks in patch 2 for enabling the EMIT_FLUSH flag.
v1 -> v2
- add a clean up preliminary patch for the existing registers
- add support for more engines
- add the Fixes tag
Andi Shyti (3):
drm/i915/gt: Cleanup aux invalidation registers
drm/i915/gt: Enable the CCS_FLUSH bit in the pipe control
drm/i915/gt: Support aux invalidation on all engines
Jonathan Cavitt (2):
drm/i915/gt: Ensure memory quiesced before invalidation
drm/i915/gt: Poll aux invalidation register bit on invalidation
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 95 ++++++++++++++------
drivers/gpu/drm/i915/gt/gen8_engine_cs.h | 3 +-
drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 14 ++-
drivers/gpu/drm/i915/gt/intel_lrc.c | 17 +---
6 files changed, 82 insertions(+), 50 deletions(-)
--
2.40.1
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