[PATCH v3 02/15] arm64: dts: qcom: sm6125: Sort spmi_bus node numerically by reg

[AngeloGioacchino Del Regno]

Il 19/07/23 23:54, Marijn Suijten ha scritto:
> On 2023-07-19 01:02:56, Dmitry Baryshkov wrote:
>> On 19/07/2023 00:24, Marijn Suijten wrote:
>>> This node has always resided in the wrong spot, making it somewhat
>>> harder to contribute new node entries while maintaining proper sorting
>>> around it.  Move the node up to sit after hsusb_phy1 where it maintains
>>> proper numerical sorting on the (first of its many) reg address
>>> property.
>>>
>>> Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>>> Signed-off-by: Marijn Suijten <marijn.suijten at somainline.org>
>>> ---
>>>    arch/arm64/boot/dts/qcom/sm6125.dtsi | 38 ++++++++++++++++++------------------
>>>    1 file changed, 19 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> index 6937c7ebdb81..cfd0901d4555 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> @@ -684,6 +684,24 @@ hsusb_phy1: phy at 1613000 {
>>>    			status = "disabled";
>>>    		};
>>>    
>>> +		spmi_bus: spmi at 1c40000 {
>>> +			compatible = "qcom,spmi-pmic-arb";
>>> +			reg = <0x01c40000 0x1100>,
>>> +			      <0x01e00000 0x2000000>,
>>> +			      <0x03e00000 0x100000>,
>>> +			      <0x03f00000 0xa0000>,
>>> +			      <0x01c0a000 0x26000>;
>>> +			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
>>> +			interrupt-names = "periph_irq";
>>> +			interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>>> +			qcom,ee = <0>;
>>> +			qcom,channel = <0>;
>>> +			#address-cells = <2>;
>>> +			#size-cells = <0>;
>>> +			interrupt-controller;
>>> +			#interrupt-cells = <4>;
>>> +		};
>>> +
>>>    		rpm_msg_ram: sram at 45f0000 {
>>>    			compatible = "qcom,rpm-msg-ram";
>>>    			reg = <0x045f0000 0x7000>;
>>> @@ -1189,27 +1207,9 @@ sram at 4690000 {
>>>    			reg = <0x04690000 0x10000>;
>>>    		};
>>>    
>>> -		spmi_bus: spmi at 1c40000 {
>>> -			compatible = "qcom,spmi-pmic-arb";
>>> -			reg = <0x01c40000 0x1100>,
>>> -			      <0x01e00000 0x2000000>,
>>> -			      <0x03e00000 0x100000>,
>>> -			      <0x03f00000 0xa0000>,
>>> -			      <0x01c0a000 0x26000>;
>>> -			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
>>> -			interrupt-names = "periph_irq";
>>> -			interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>>> -			qcom,ee = <0>;
>>> -			qcom,channel = <0>;
>>> -			#address-cells = <2>;
>>> -			#size-cells = <0>;
>>> -			interrupt-controller;
>>> -			#interrupt-cells = <4>;
>>> -		};
>>> -
>>>    		apps_smmu: iommu at c600000 {
>>>    			compatible = "qcom,sm6125-smmu-500", "qcom,smmu-500", "arm,mmu-500";
>>> -			reg = <0xc600000 0x80000>;
>>> +			reg = <0x0c600000 0x80000>;
>>
>> Irrelevant, please split.
> 
> This was already here in v1, and it is what likely contributed to the
> sorting mismatch in the first place.
> 
> But will split it and send a v4 for just this...
> 

I agree in that it is irrelevant, but anyway, for the next time: you should at
least mention "the other change" in your commit message ;-)

Also, remember that this commit has a Fixes tag........ :-)

Cheers,
Angelo