[Intel-gfx] [PATCH] drm/i915: Avoid GGTT flushing on non-GGTT paths of i915_vma_pin_iomap
Andi Shyti
andi.shyti at linux.intel.com
Mon Jul 24 20:16:06 UTC 2023
Hi Tvrtko,
On Mon, Jul 24, 2023 at 01:56:33PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> Commit 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is available")
> added a code path which does not map via GGTT, but was still setting the
> ggtt write bit, and so triggering the GGTT flushing.
>
> Fix it by not setting that bit unless the GGTT mapping path was used, and
> replace the flush with wmb() in i915_vma_flush_writes().
>
> This also works for the i915_gem_object_pin_map path added in
> d976521a995a ("drm/i915: extend i915_vma_pin_iomap()").
>
> It is hard to say if the fix has any observable effect, given that the
> write-combine buffer gets flushed from intel_gt_flush_ggtt_writes too, but
> apart from code clarity, skipping the needless GGTT flushing could be
> beneficial on platforms with non-coherent GGTT. (See the code flow in
> intel_gt_flush_ggtt_writes().)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Fixes: 4bc91dbde0da ("drm/i915/lmem: Bypass aperture when lmem is available")
> References: d976521a995a ("drm/i915: extend i915_vma_pin_iomap()")
> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Cc: <stable at vger.kernel.org> # v5.14+
> ---
> drivers/gpu/drm/i915/i915_vma.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index ffb425ba591c..f2b626cd2755 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -602,7 +602,9 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
> if (err)
> goto err_unpin;
>
> - i915_vma_set_ggtt_write(vma);
> + if (!i915_gem_object_is_lmem(vma->obj) &&
> + i915_vma_is_map_and_fenceable(vma))
> + i915_vma_set_ggtt_write(vma);
>
> /* NB Access through the GTT requires the device to be awake. */
> return page_mask_bits(ptr);
> @@ -617,6 +619,8 @@ void i915_vma_flush_writes(struct i915_vma *vma)
> {
> if (i915_vma_unset_ggtt_write(vma))
> intel_gt_flush_ggtt_writes(vma->vm->gt);
> + else
> + wmb(); /* Just flush the write-combine buffer. */
is flush the right word? Can you expand more the explanation in
this comment and why this point of synchronization is needed
here? (I am even wondering if it is really needed).
Anyway, it looks good:
Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>
Andi
> }
>
> void i915_vma_unpin_iomap(struct i915_vma *vma)
> --
> 2.39.2
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