[PATCH 1/2] accel/ivpu: Do not trigger extra VPU reset if the VPU is idle

[Jeffrey Hugo]

On 5/25/2023 4:38 AM, Stanislaw Gruszka wrote:
> From: Andrzej Kacprowski <andrzej.kacprowski at linux.intel.com>
> 
> Turning off the PLL and entering D0i3 will reset the VPU so
> an explicit IP reset is redundant.
> But if the VPU is active, it may interfere with PLL disabling
> and to avoid that, we have to issue an additional IP reset
> to silence the VPU before turning off the PLL.
> 
> Fixes: a8fed6d1e0b9 ("accel/ivpu: Fix power down sequence")
> Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski at linux.intel.com>
> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>

Reviewed-by: Jeffrey Hugo <quic_jhugo at quicinc.com>