[PATCH 3/8] drm/msm/dpu: drop dpu_core_perf_params::max_per_pipe_ib
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Tue Jun 20 10:53:03 UTC 2023
On 20/06/2023 13:46, Konrad Dybcio wrote:
> On 20.06.2023 02:08, Dmitry Baryshkov wrote:
>> The max_per_pipe_ib is a constant across all CRTCs and is read from the
>> catalog. Drop corresponding calculations and read the value directly at
>> icc_set_bw() time.
>>
>> Suggested-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>> ---
> This looks good, but doesn't apply on next-20230620
Hmm. It applied w/o any issues here.
>
> Konrad
>> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 +++++------------
>> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 2 --
>> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
>> 3 files changed, 5 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> index 9902febc72c0..ba146af73bc5 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> @@ -105,13 +105,12 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
>> memset(perf, 0, sizeof(struct dpu_core_perf_params));
>>
>> perf->bw_ctl = _dpu_core_perf_calc_bw(kms, crtc);
>> - perf->max_per_pipe_ib = kms->catalog->perf->min_dram_ib;
>> perf->core_clk_rate = _dpu_core_perf_calc_clk(kms, crtc, state);
>>
>> DRM_DEBUG_ATOMIC(
>> - "crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu\n",
>> + "crtc=%d clk_rate=%llu core_ab=%llu\n",
>> crtc->base.id, perf->core_clk_rate,
>> - perf->max_per_pipe_ib, perf->bw_ctl);
>> + perf->bw_ctl);
>> }
>>
>> int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
>> @@ -199,9 +198,6 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
>> dpu_crtc_get_client_type(tmp_crtc)) {
>> dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
>>
>> - perf.max_per_pipe_ib = max(perf.max_per_pipe_ib,
>> - dpu_cstate->new_perf.max_per_pipe_ib);
>> -
>> perf.bw_ctl += dpu_cstate->new_perf.bw_ctl;
>>
>> DRM_DEBUG_ATOMIC("crtc=%d bw=%llu paths:%d\n",
>> @@ -217,7 +213,7 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
>> do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/
>>
>> for (i = 0; i < kms->num_paths; i++)
>> - icc_set_bw(kms->path[i], avg_bw, perf.max_per_pipe_ib);
>> + icc_set_bw(kms->path[i], avg_bw, kms->catalog->perf->min_dram_ib);
>>
>> return ret;
>> }
>> @@ -320,15 +316,12 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
>> * 2. new bandwidth vote - "ab or ib vote" is lower
>> * than current vote at end of commit or stop.
>> */
>> - if ((params_changed && ((new->bw_ctl > old->bw_ctl) ||
>> - (new->max_per_pipe_ib > old->max_per_pipe_ib))) ||
>> - (!params_changed && ((new->bw_ctl < old->bw_ctl) ||
>> - (new->max_per_pipe_ib < old->max_per_pipe_ib)))) {
>> + if ((params_changed && new->bw_ctl > old->bw_ctl) ||
>> + (!params_changed && new->bw_ctl < old->bw_ctl)) {
>> DRM_DEBUG_ATOMIC("crtc=%d p=%d new_bw=%llu,old_bw=%llu\n",
>> crtc->base.id, params_changed,
>> new->bw_ctl, old->bw_ctl);
>> old->bw_ctl = new->bw_ctl;
>> - old->max_per_pipe_ib = new->max_per_pipe_ib;
>> update_bus = true;
>> }
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
>> index e02cc2324af2..2bf7836f79bb 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
>> @@ -16,12 +16,10 @@
>>
>> /**
>> * struct dpu_core_perf_params - definition of performance parameters
>> - * @max_per_pipe_ib: maximum instantaneous bandwidth request
>> * @bw_ctl: arbitrated bandwidth request
>> * @core_clk_rate: core clock rate request
>> */
>> struct dpu_core_perf_params {
>> - u64 max_per_pipe_ib;
>> u64 bw_ctl;
>> u64 core_clk_rate;
>> };
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
>> index 1edf2b6b0a26..ff5d306b95ed 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
>> @@ -1400,8 +1400,6 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
>> seq_printf(s, "core_clk_rate: %llu\n",
>> dpu_crtc->cur_perf.core_clk_rate);
>> seq_printf(s, "bw_ctl: %llu\n", dpu_crtc->cur_perf.bw_ctl);
>> - seq_printf(s, "max_per_pipe_ib: %llu\n",
>> - dpu_crtc->cur_perf.max_per_pipe_ib);
>>
>> return 0;
>> }
--
With best wishes
Dmitry
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