[PATCH 04/15] dt-bindings: clock: qcom,dispcc-sm6125: Allow power-domains property
Marijn Suijten
marijn.suijten at somainline.org
Sat Jun 24 00:41:02 UTC 2023
On SM6125 the dispcc block is gated behind VDDCX: allow this domain to
be configured.
Signed-off-by: Marijn Suijten <marijn.suijten at somainline.org>
---
Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
index 11ec154503a3..02796675e8f6 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
@@ -46,6 +46,9 @@ properties:
'#power-domain-cells':
const: 1
+ power-domains:
+ maxItems: 1
+
reg:
maxItems: 1
@@ -63,6 +66,7 @@ examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/qcom,gcc-sm6125.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
clock-controller at 5f00000 {
compatible = "qcom,sm6125-dispcc";
reg = <0x5f00000 0x20000>;
@@ -80,6 +84,7 @@ examples:
"dsi1_phy_pll_out_dsiclk",
"dp_phy_pll_link_clk",
"dp_phy_pll_vco_div_clk";
+ power-domains = <&rpmpd SM6125_VDDCX>;
#clock-cells = <1>;
#power-domain-cells = <1>;
};
--
2.41.0
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