[PATCH 1/2] drm/msm/dpu: fix DSC 1.2 block lengths
Marijn Suijten
marijn.suijten at somainline.org
Sun Jun 25 21:33:19 UTC 2023
On 2023-06-23 15:12:06, Abhinav Kumar wrote:
>
>
> On 6/23/2023 1:28 PM, Marijn Suijten wrote:
> > On 2023-06-23 14:37:12, Dmitry Baryshkov wrote:
> > <snip>
> >>> In fact I asked to make it 0xf00 + 0x10 or 0xf80 + 0x10 to also cover
> >>> the CTL registers, but that change didn't make it through. 0x29c is an
> >>> arbitrary number that I have no clue what it was based on.
> >>
> >> This should have been NAKed. or at least TODOed.
> >
> > As usual ;) - add new features first, fix the fundamentals... later?
> >
> > - Marijn
>
> I think you yourself found out that this was not an arbitary number but
> we atleast wanted to cover the full encoder set.
>
> So fundamentals are always sound sometimes understanding is not ;)
The fundamentals are not sound until the CTL block/register can be
dumped ;)
- Marijn
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