[PATCH v2 4/8] accel/qaic: Add control path

[Jeffrey Hugo]

On 3/1/2023 6:18 AM, Stanislaw Gruszka wrote:
> On Mon, Feb 06, 2023 at 08:41:41AM -0700, Jeffrey Hugo wrote:
>> +	 * It turns out several of the iommu drivers don't combine adjacent
>> +	 * regions, which is really what we expect based on the description of
>> +	 * dma_map_sgtable(), so lets see if that can be done.  It makes our message
>> +	 * more efficent.
>> +	 */
> 
> Interesting ...
> 
>> +	last = sgt->sgl;
>> +	nents_dma = nents;
>> +	size = QAIC_MANAGE_EXT_MSG_LENGTH - msg_hdr_len - sizeof(*out_trans);
>> +	for_each_sgtable_sg(sgt, sg, i) {
>> +		if (sg_dma_address(last) + sg_dma_len(last) !=
>> +		    sg_dma_address(sg)) {
>> +			size -= sizeof(*asp);
>> +			/* Save 1K for possible follow-up transactions. */
>> +			if (size < SZ_1K) {
>> +				nents_dma = i;
>> +				break;
>> +			}
>> +		}
>> +		last = sg;
>> +	}
> 
> I would say there is reason why iommu do not combine or there is problem in iommu driver.
> If there is reason for not-combining this code is wrong.
> If problem is in iommu driver why not fixup iommu ?

So, previously, dma_map_sg was routed to the IOMMU drivers, and many of 
them did not optimize the mappings (looked like a choice of simplicity 
over best effort).  Looking at the details today, it looks like the 
DMA-API is handled by a common iommu driver, and it looks like it does 
the optimization after the IOMMU drivers do their mapping.

I'm going to recheck if this is used after that refactor, and if not, 
rip it out.