[PATCH v16 14/16] drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support

[Adam Ford]

On Wed, Mar 8, 2023 at 10:41 AM Jagan Teki <jagan at amarulasolutions.com> wrote:
>
> Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC.
>
> Add compatible and associated driver_data for it.
>
I have a few updates that I want to push once this series has been
accepted to support non-burst mode, fine-tune the PMS clock, and a few
other things.  I have the DSI working through a DSI to HDMI bridge
along with audio in case anyone is interested.

I have my repo here which is based on Jagan's V16 branch:
https://github.com/aford173/linux/tree/imx8mm-dsi-v16-beacon


For the series:

Tested-by: Adam Ford <aford173 at gmail.com> #imx8mm-beacon


> Reviewed-by: Marek Vasut <marex at denx.de>
> Reviewed-by: Frieder Schrempf <frieder.schrempf at kontron.de>
> Acked-by: Robert Foss <robert.foss at linaro.org>
> Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Signed-off-by: Marek Szyprowski <m.szyprowski at samsung.com>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> ---
> Changes for v16, v15, v13:
> - none
> Changes for v12:
> - collect RB from Marek
> Changes for v11:
> - collect RB from Frieder
> - collect ACK from Robert
> Changes for v10, v9:
> - none
> Changed for v8:
> - fix and update the comment
> Changes for v7, v6:
> - none
> Changes for v3:
> - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk
> Changes for v5:
> - [mszyprow] rebased and adjusted to the new driver initialization
> - drop quirk
> Changes for v4:
> - none
> Changes for v3:
> - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk
> Changes for v2:
> - collect Laurent r-b
> Changes for v1:
> - none
>
>  drivers/gpu/drm/bridge/samsung-dsim.c | 44 +++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index f9a5e69a0fcd..f3bd06489a39 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -376,6 +376,24 @@ static const unsigned int exynos5433_reg_values[] = {
>         [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0c),
>  };
>
> +static const unsigned int imx8mm_dsim_reg_values[] = {
> +       [RESET_TYPE] = DSIM_SWRST,
> +       [PLL_TIMER] = 500,
> +       [STOP_STATE_CNT] = 0xf,
> +       [PHYCTRL_ULPS_EXIT] = 0,
> +       [PHYCTRL_VREG_LP] = 0,
> +       [PHYCTRL_SLEW_UP] = 0,
> +       [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x06),
> +       [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0b),
> +       [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x07),
> +       [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x26),
> +       [PHYTIMING_CLK_POST] = DSIM_PHYTIMING1_CLK_POST(0x0d),
> +       [PHYTIMING_CLK_TRAIL] = DSIM_PHYTIMING1_CLK_TRAIL(0x08),
> +       [PHYTIMING_HS_PREPARE] = DSIM_PHYTIMING2_HS_PREPARE(0x08),
> +       [PHYTIMING_HS_ZERO] = DSIM_PHYTIMING2_HS_ZERO(0x0d),
> +       [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b),
> +};
> +
>  static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = {
>         .reg_ofs = exynos_reg_ofs,
>         .plltmr_reg = 0x50,
> @@ -437,6 +455,22 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = {
>         .reg_values = exynos5422_reg_values,
>  };
>
> +static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = {
> +       .reg_ofs = exynos5433_reg_ofs,
> +       .plltmr_reg = 0xa0,
> +       .has_clklane_stop = 1,
> +       .num_clks = 2,
> +       .max_freq = 2100,
> +       .wait_for_reset = 0,
> +       .num_bits_resol = 12,
> +       /*
> +        * Unlike Exynos, PLL_P(PMS_P) offset 14 is used in i.MX8M Mini/Nano/Plus
> +        * downstream driver - drivers/gpu/drm/bridge/sec-dsim.c
> +        */
> +       .pll_p_offset = 14,
> +       .reg_values = imx8mm_dsim_reg_values,
> +};
> +
>  static const struct samsung_dsim_driver_data *
>  samsung_dsim_types[DSIM_TYPE_COUNT] = {
>         [DSIM_TYPE_EXYNOS3250] = &exynos3_dsi_driver_data,
> @@ -444,6 +478,7 @@ samsung_dsim_types[DSIM_TYPE_COUNT] = {
>         [DSIM_TYPE_EXYNOS5410] = &exynos5_dsi_driver_data,
>         [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data,
>         [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data,
> +       [DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data,
>  };
>
>  static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h)
> @@ -1877,7 +1912,16 @@ const struct dev_pm_ops samsung_dsim_pm_ops = {
>  };
>  EXPORT_SYMBOL_GPL(samsung_dsim_pm_ops);
>
> +static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = {
> +       .hw_type = DSIM_TYPE_IMX8MM,
> +       .host_ops = &generic_dsim_host_ops,
> +};
> +
>  static const struct of_device_id samsung_dsim_of_match[] = {
> +       {
> +               .compatible = "fsl,imx8mm-mipi-dsim",
> +               .data = &samsung_dsim_imx8mm_pdata,
> +       },
>         { /* sentinel. */ }
>  };
>  MODULE_DEVICE_TABLE(of, samsung_dsim_of_match);
> --
> 2.25.1
>