[PATCH V3 3/7] drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically

Alexander Stein alexander.stein at ew.tq-group.com
Thu May 4 12:40:34 UTC 2023


Hi Adam,

Am Donnerstag, 4. Mai 2023, 14:00:08 CEST schrieb Adam Ford:
> On Thu, May 4, 2023 at 4:21 AM Alexander Stein
> 
> <alexander.stein at ew.tq-group.com> wrote:
> > Am Dienstag, 2. Mai 2023, 03:07:55 CEST schrieb Adam Ford:
> > > Make the pll-clock-frequency optional.  If it's present, use it
> > > to maintain backwards compatibility with existing hardware.  If it
> > > is absent, read clock rate of "sclk_mipi" to determine the rate.
> > > 
> > > Signed-off-by: Adam Ford <aford173 at gmail.com>
> > > Tested-by: Chen-Yu Tsai <wenst at chromium.org>
> > > ---
> > > 
> > >  drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++++++--
> > >  1 file changed, 10 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
> > > b/drivers/gpu/drm/bridge/samsung-dsim.c index bf4b33d2de76..2dc02a9e37c0
> > > 100644
> > > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > > @@ -1726,12 +1726,20 @@ static int samsung_dsim_parse_dt(struct
> > > samsung_dsim *dsi) {
> > > 
> > >       struct device *dev = dsi->dev;
> > >       struct device_node *node = dev->of_node;
> > > 
> > > +     struct clk *pll_clk;
> > > 
> > >       int ret;
> > >       
> > >       ret = samsung_dsim_of_read_u32(node,
> > >       "samsung,pll-clock-frequency",
> > >       
> > >                                      &dsi->pll_clk_rate);
> > > 
> > > -     if (ret < 0)
> > > -             return ret;
> > > +
> > > +     /* If it doesn't exist, read it from the clock instead of failing
> > > */
> > > +     if (ret < 0) {
> > > +             pll_clk = devm_clk_get(dev, "sclk_mipi");
> > > +             if (!IS_ERR(pll_clk))
> > > +                     dsi->pll_clk_rate = clk_get_rate(pll_clk);
> > > +             else
> > > +                     return PTR_ERR(pll_clk);
> > > +     }
> > 
> > Now that 'samsung,pll-clock-frequency' is optional the error in
> > samsung_dsim_of_read_u32() should be changed. Otherwise you will get
> > 
> > > /soc at 0/bus at 32c00000/dsi at 32e10000: failed to get 'samsung,pll-clock-
> > 
> > frequency' property
> 
> I'll change the message from err to info with a message that reads "no
> samsung,pll-clock-frequency, using pixel clock"
> 
> Does that work?

Having just a info is totally fine with me. Thanks.
Although your suggested message somehow implies (to me) using pixel clock is 
just a fallback. I'm a bit concerned some might think "samsung,pll-clock-
frequency" should be provided in DT. But this might just be me.

Best regards,
Alexander

> adam
> 
> > Best regards,
> > Alexander
> > 
> > >       ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-
> > 
> > frequency",
> > 
> > >                                      &dsi->burst_clk_rate);
> > 
> > --
> > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> > Amtsgericht München, HRB 105018
> > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> > http://www.tq-group.com/


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/




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