[PATCH 3/4] drm/mgag200: Add IRQ support

Jocelyn Falempe jfalempe at redhat.com
Fri May 5 12:43:36 UTC 2023


Register irq, and enable the softrap irq.
This patch has no functional impact since softrap
irq can't be triggered without DMA.

Signed-off-by: Jocelyn Falempe <jfalempe at redhat.com>
---
 drivers/gpu/drm/mgag200/mgag200_drv.c | 41 +++++++++++++++++++++++++++
 drivers/gpu/drm/mgag200/mgag200_drv.h |  3 ++
 drivers/gpu/drm/mgag200/mgag200_reg.h |  3 ++
 3 files changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 976f0ab2006b..3566fcdfe1e4 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -110,12 +110,43 @@ resource_size_t mgag200_device_probe_vram(struct mga_device *mdev)
 	return mgag200_probe_vram(mdev->vram, resource_size(mdev->vram_res));
 }
 
+irqreturn_t mgag200_driver_irq_handler(int irq, void *arg)
+{
+	struct mga_device *mdev = (struct mga_device *) arg;
+	u32 status;
+
+	status = RREG32(MGAREG_STATUS);
+
+	if (status & MGAIRQ_SOFTRAP) {
+		WREG32(MGAREG_ICLEAR, MGAIRQ_SOFTRAP);
+		mdev->dma_in_use = 0;
+		wake_up(&mdev->waitq);
+		return IRQ_HANDLED;
+	}
+	return IRQ_NONE;
+}
+
+void mgag200_init_irq(struct mga_device *mdev)
+{
+	/* Disable *all* interrupts */
+	WREG32(MGAREG_IEN, 0);
+	/* Clear bits if they're already high */
+	WREG32(MGAREG_ICLEAR, 0xf);
+}
+
+void mgag200_enable_irq(struct mga_device *mdev)
+{
+	/* Enable only Softrap IRQ */
+	WREG32(MGAREG_IEN, MGAIRQ_SOFTRAP);
+}
+
 int mgag200_device_preinit(struct mga_device *mdev)
 {
 	struct drm_device *dev = &mdev->base;
 	struct pci_dev *pdev = to_pci_dev(dev->dev);
 	resource_size_t start, len;
 	struct resource *res;
+	int ret;
 
 	/* BAR 1 contains registers */
 
@@ -153,6 +184,16 @@ int mgag200_device_preinit(struct mga_device *mdev)
 	if (!mdev->vram)
 		return -ENOMEM;
 
+	mgag200_init_irq(mdev);
+	ret = devm_request_irq(dev->dev, pdev->irq, mgag200_driver_irq_handler,
+			       IRQF_SHARED, "mgag200_irq", mdev);
+	if (ret < 0) {
+		drm_err(dev, "devm_request_irq(VRAM) failed %d\n", ret);
+		return -ENXIO;
+	}
+	init_waitqueue_head(&mdev->waitq);
+
+	mgag200_enable_irq(mdev);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 9e604dbb8e44..02175bfaf5a8 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -291,6 +291,9 @@ struct mga_device {
 	void __iomem			*vram;
 	resource_size_t			vram_available;
 
+	wait_queue_head_t waitq;
+	int dma_in_use;
+
 	struct drm_plane primary_plane;
 	struct drm_crtc crtc;
 	struct drm_encoder encoder;
diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h
index aa73463674e4..748c8e18e938 100644
--- a/drivers/gpu/drm/mgag200/mgag200_reg.h
+++ b/drivers/gpu/drm/mgag200/mgag200_reg.h
@@ -107,6 +107,9 @@
 #define	MGAREG_ICLEAR		0x1e18
 #define	MGAREG_IEN		0x1e1c
 
+/* same bit shift for MGAREG_IEN, MGAREG_ICLEAR and MGAREG_STATUS */
+#define MGAIRQ_SOFTRAP		BIT(0)
+
 #define	MGAREG_VCOUNT		0x1e20
 
 #define	MGAREG_Reset		0x1e40
-- 
2.39.2



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