[Freedreno] [PATCH v2 6/9] drm/msm/dpu: simplify qos_ctrl handling

Jeykumar Sankaran quic_jeykumar at quicinc.com
Fri May 5 17:20:48 UTC 2023



On 5/2/2023 8:05 AM, Dmitry Baryshkov wrote:
> After removal of DPU_PLANE_QOS_VBLANK_CTRL, several fields of struct
> dpu_hw_pipe_qos_cfg are fixed to false/0. Drop them from the structure
> (and drop the corresponding code from the functions).
> 
> The DPU_PLANE_QOS_VBLANK_AMORTIZE flag is also removed, since it is now
> a NOP.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 10 ----------
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h |  6 ------
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c   | 17 ++---------------
>   3 files changed, 2 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index b198def5534b..341e3a8fc927 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -575,16 +575,6 @@ static void dpu_hw_sspp_setup_qos_ctrl(struct dpu_hw_sspp *ctx,
>   	if (!ctx)
>   		return;
>   
> -	if (cfg->vblank_en) {
> -		qos_ctrl |= ((cfg->creq_vblank &
> -				SSPP_QOS_CTRL_CREQ_VBLANK_MASK) <<
> -				SSPP_QOS_CTRL_CREQ_VBLANK_OFF);
> -		qos_ctrl |= ((cfg->danger_vblank &
> -				SSPP_QOS_CTRL_DANGER_VBLANK_MASK) <<
> -				SSPP_QOS_CTRL_DANGER_VBLANK_OFF);
> -		qos_ctrl |= SSPP_QOS_CTRL_VBLANK_EN;
> -	}
> -
>   	if (cfg->danger_safe_en)
>   		qos_ctrl |= SSPP_QOS_CTRL_DANGER_SAFE_EN;
>   
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> index 86bf4b2cda77..aaf6f41d546c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> @@ -165,15 +165,9 @@ struct dpu_sw_pipe_cfg {
>   
>   /**
>    * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration
> - * @creq_vblank: creq value generated to vbif during vertical blanking
> - * @danger_vblank: danger value generated during vertical blanking
> - * @vblank_en: enable creq_vblank and danger_vblank during vblank
>    * @danger_safe_en: enable danger safe generation
>    */
>   struct dpu_hw_pipe_qos_cfg {
> -	u32 creq_vblank;
> -	u32 danger_vblank;
> -	bool vblank_en;
>   	bool danger_safe_en;
>   };
>   
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 3cb891917b65..0ed350776775 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -73,12 +73,9 @@ static const uint32_t qcom_compressed_supported_formats[] = {
>   /**
>    * enum dpu_plane_qos - Different qos configurations for each pipe
>    *
> - * @DPU_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
> - *	this configuration is mutually exclusive from VBLANK_CTRL.
>    * @DPU_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
>    */
>   enum dpu_plane_qos {
> -	DPU_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
>   	DPU_PLANE_QOS_PANIC_CTRL = BIT(2),
>   };
>   
> @@ -359,25 +356,15 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
>   
>   	memset(&pipe_qos_cfg, 0, sizeof(pipe_qos_cfg));
>   
> -	if (flags & DPU_PLANE_QOS_VBLANK_AMORTIZE) {
> -		pipe_qos_cfg.vblank_en = false;
> -		pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
> -	}
> -
>   	if (flags & DPU_PLANE_QOS_PANIC_CTRL)
>   		pipe_qos_cfg.danger_safe_en = enable;
>   
> -	if (!pdpu->is_rt_pipe) {
> -		pipe_qos_cfg.vblank_en = false;
> +	if (!pdpu->is_rt_pipe)
>   		pipe_qos_cfg.danger_safe_en = false;
> -	}
>   
> -	DPU_DEBUG_PLANE(pdpu, "pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
> +	DPU_DEBUG_PLANE(pdpu, "pnum:%d ds:%d is_rt:%d\n",
>   		pdpu->pipe - SSPP_VIG0,
>   		pipe_qos_cfg.danger_safe_en,
> -		pipe_qos_cfg.vblank_en,
> -		pipe_qos_cfg.creq_vblank,
> -		pipe_qos_cfg.danger_vblank,
>   		pdpu->is_rt_pipe);
>   
>   	pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,
Reviewed-by: Jeykumar Sankaran <quic_jeykumar at quicinc.com>


More information about the dri-devel mailing list