[PATCH v6 2/8] drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0

[Dmitry Baryshkov]

On 11/05/2023 07:42, Abhinav Kumar wrote:
> 
> 
> On 5/10/2023 9:39 PM, Dmitry Baryshkov wrote:
>> On 11/05/2023 07:38, Abhinav Kumar wrote:
>>>
>>>
>>> On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote:
>>>> On 11/05/2023 01:07, Kuogee Hsieh wrote:
>>>>> DPU < 7.0.0 requires the PINGPONG block to be involved during
>>>>> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC
>>>>> encoder engine moved to INTF with the help of the flush mechanism.
>>>>
>>>> Nit: was moved.
>>>>
>>>>> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of
>>>>> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the
>>>>> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not
>>>>> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore.
>>>>
>>>> this looks good
>>>>
>>>>> Existing call-sites to these callbacks already skip calling into
>>>>> them if the function pointer is NULL.
>>>>
>>>> This is more relevant for patch 3 commit message.
>>>>
>>>>> Add DPU_PINGPONG_DSC feature
>>>>> bit to all chipset with DPU < 7.0.0.
>>>>
>>>> This is incorrect, as we do not change the catalog in this patch.
>>>>
>>>
>>> Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that.
>>
>> Because the patch does not add this feature bit to any of the 
>> chipsets. I think the relevant patch was lost somewhere during the 
>> rework/rebase.
>>
>>
>>
> 
> This is adding it right?
> 
>    #define PINGPONG_SDM845_MASK \
> -    (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE))
> +    (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | 
> BIT(DPU_PINGPONG_DSC))
>    #define PINGPONG_SDM845_TE2_MASK \


Ah, I see now. I was expecting changes to the actual catlog files. 
Please excuse me.

As we are using PINGPONG_SDM845_MASK only up to and including DPU 6.x, 
this is correct.

I'd then suggest rephrasing this sentence to be more explicit:

Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, which is used for all DPU 
< 7.0 chipsets.

-- 
With best wishes
Dmitry