[PATCH v10 6/8] drm/msm/dpu: separate DSC flush update out of interface
Marijn Suijten
marijn.suijten at somainline.org
Thu May 18 07:03:20 UTC 2023
On 2023-05-18 03:35:31, Dmitry Baryshkov wrote:
<snip>
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> > index 6292002..d5f3ef8 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> > @@ -158,6 +158,15 @@ struct dpu_hw_ctl_ops {
> > enum dpu_dspp blk, u32 dspp_sub_blk);
> >
> > /**
> > + * OR in the given flushbits to the cached pending_(dsc_)flush_mask
> > + * No effect on hardware
> > + * @ctx: ctl path ctx pointer
> > + * @blk: interface block index
> > + */
> > + void (*update_pending_flush_dsc)(struct dpu_hw_ctl *ctx,
> > + enum dpu_dsc blk);
>
> Please align to the opening parenthesis.
I requested this change to a single tab specifically to match the rest
of the indentation of these callbacks. Perhaps we should submit a
followup patch realigning all of them at once (and fixing the doc
comments, and and and...).
- Marijn
> > +
> > + /**
> > * Write the value of the pending_flush_mask to hardware
> > * @ctx : ctl path ctx pointer
> > */
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