[PATCH v14 1/2] drm: add kms driver for loongson display controller
Sui Jingfeng
15330273260 at 189.cn
Mon May 22 07:27:31 UTC 2023
Hi,
I love your reviews,
On 2023/5/21 20:21, WANG Xuerui wrote:
> Hi,
>
> Someone else in a discussion group brought my attention to this
> series, that I've neglected for a long time because
> loongarch at lists.linux.dev isn't on the Cc list and I'm not subscribed
> to dri-devel.
>
> While I'm reasonably familiar with LoongArch internals and Linux in
> general, I don't regularly tinker with the graphics things, so I'm
> mainly focusing on the natural language usage and general code smells
> for my reviews below. Pardon me if some of the questions seem silly.
>
> (After going through the entirety of this: *please* spell-check your
> comment blocks, and correct obvious grammatical nits as best as you
> can. From my first impression, although a reader not familiar with
> LoongArch nor Chinese could go a long way in understanding this, some
> of the rest would be misunderstood, or don't make sense at all. And
> like 90% of the sentences are grammatically incorrect, i.e. are
> obvious "Chinglish". Maybe something like those ChatGPT-based services
> or someone in your company would help.)
>
OK, I didn't realize that grammar problem could up to 90%.
I'm focus on feature development previously, I will do the grammar
check before send the next version.
>
>
[...]
>
> On 2023/5/20 18:57, Sui Jingfeng wrote:
>> From: Sui Jingfeng <suijingfeng at loongson.cn>
>>
>> Loongson display controller IP has been integrated in both Loongson
>> north
>> bridge chipset(ls7a1000/ls7a2000) and Loongson
>> SoCs(ls2k1000/ls2k2000), it
>> has been even included in Loongson self-made BMC products.
>>
>> This display controller is a PCI device. It has two display pipes and
>> each
>> display pipe support a primary plane and a cursor plane. For the DC
>> in the
>
> "supports"
Ok, you are correct here.
>
>> ls7a1000 and ls2k1000, each display pipe has a DVO output interface
>> which
>> provide RGB888 signals, vertical & horizontal synchronisations and pixel
>
> "synchronisation"
>
Ok, you are correct here.
>> clock. Each CRTC is able to support 1920x1080 at 60Hz, the maximum
>> resolution
>
> "is capable of" sounds more natural?
>
I think they are equivalent, I can't perceive the difference.
>> of each display pipe is 2048x2048 according to the hardware spec.
>>
>> For the DC in LS7A2000, each display pipe is equipped with a built-in
>> HDMI
>> encoder which is compliant with the HDMI 1.4 specification, thus it
>> support
>
> "supporting up to 3840x2160 at 30Hz"
>
acceptable
>> 3840x2160 at 30Hz. The first display pipe is also equipped with a
>> transparent
>> vga encoder which is parallel with the HDMI encoder. The DC in
>> LS7A2000 is
>
> "The first display pipe additionally has a transparent VGA encoder"?
>
The first display pipe(pipe 0) also has a transparent VGA encoder.
>> more complete compare with the one in old chips, besides above
>> feature, it
>> has two hardware cursors, two hardware vblank counter and two scanout
>> position recorders unit. It also support tiled framebuffer format which
>> can be scanout the tiled framebuffer rendered by the LoongGPU directly.
>
> "The DC in LS7A2000 is more feature-complete compared with the older
> revision: in addition to the above, it also has two hardware cursors,
> two hardware vblank counters and two scanout position recorders. It
> also supports tiled framebuffer format so the tiled output from the
> LoongGPU can be scanned out directly."
OK, acceptable.
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