[PATCH v2 2/2] drm/bridge: ti-sn65dsi83: Fix enable/disable flow to meet spec

[Frieder Schrempf]

On 17.05.23 00:22, Fabio Estevam wrote:
> On Thu, May 4, 2023 at 6:12 AM Alexander Stein
> <alexander.stein at ew.tq-group.com> wrote:
>>
>> Am Mittwoch, 3. Mai 2023, 18:33:07 CEST schrieb Frieder Schrempf:
>>> From: Frieder Schrempf <frieder.schrempf at kontron.de>
>>>
>>> The datasheet describes the following initialization flow including
>>> minimum delay times between each step:
>>>
>>> 1. DSI data lanes need to be in LP-11 and the clock lane in HS mode
>>> 2. toggle EN signal
>>> 3. initialize registers
>>> 4. enable PLL
>>> 5. soft reset
>>> 6. enable DSI stream
>>> 7. check error status register
>>>
>>> To meet this requirement we need to make sure the host bridge's
>>> pre_enable() is called first by using the pre_enable_prev_first
>>> flag.
>>>
>>> Furthermore we need to split enable() into pre_enable() which covers
>>> steps 2-5 from above and enable() which covers step 7 and is called
>>> after the host bridge's enable().
>>>
>>> Signed-off-by: Frieder Schrempf <frieder.schrempf at kontron.de>
>>
>> Tested-by: Alexander Stein <alexander.stein at ew.tq-group.com> #TQMa8MxML/MBa8Mx
> 
> Should this have a Fixes tag so that it could be backported to stable kernels?

As this depends on the support for the pre_enable_prev_first flag,
currently the only candidates for backporting would be 6.3 and 6.4.

I can't tell if there are DSI host drivers which already implement the
proper init flow and would benefit from a backport.

Anyway, it shouldn't be a problem either so I guess the proper tags
would look like:

Cc: <stable at vger.kernel.org> # 6.3.x, 6.4.x
Fixes: ceb515ba29ba ("drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and
SN65DSI84 driver")