[RFC PATCH v2 10/13] drm/msm/dpu: add list of supported formats to the DPU caps

Abhinav Kumar quic_abhinavk at quicinc.com
Wed May 24 23:16:20 UTC 2023



On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
> As we are going to add virtual planes, add the list of supported formats
> to the hw catalog entry. It will be used to setup universal planes, with
> later selecting a pipe depending on whether the YUV format is used for
> the framebuffer.
> 

If your usage of format_list is going to be internal to dpu_plane.c, I 
can think of another idea for this change.

This essentially translates to if (num_vig >= 1)

If we can just have a small helper to detect that from the catalog can 
we use that instead of adding formats to the dpu caps?

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>   .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c    | 26 +++++++++++++++++++
>   .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h    |  4 +++
>   2 files changed, 30 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 212d546b6c5d..2d6944a9679a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -315,6 +315,8 @@ static const struct dpu_caps msm8998_dpu_caps = {
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>   	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>   	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps qcm2290_dpu_caps = {
> @@ -324,6 +326,8 @@ static const struct dpu_caps qcm2290_dpu_caps = {
>   	.has_idle_pc = true,
>   	.max_linewidth = 2160,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sdm845_dpu_caps = {
> @@ -339,6 +343,8 @@ static const struct dpu_caps sdm845_dpu_caps = {
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>   	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>   	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sc7180_dpu_caps = {
> @@ -350,6 +356,8 @@ static const struct dpu_caps sc7180_dpu_caps = {
>   	.has_idle_pc = true,
>   	.max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm6115_dpu_caps = {
> @@ -361,6 +369,8 @@ static const struct dpu_caps sm6115_dpu_caps = {
>   	.has_idle_pc = true,
>   	.max_linewidth = 2160,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm8150_dpu_caps = {
> @@ -376,6 +386,8 @@ static const struct dpu_caps sm8150_dpu_caps = {
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>   	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>   	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sc8180x_dpu_caps = {
> @@ -391,6 +403,8 @@ static const struct dpu_caps sc8180x_dpu_caps = {
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>   	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>   	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sc8280xp_dpu_caps = {
> @@ -404,6 +418,8 @@ static const struct dpu_caps sc8280xp_dpu_caps = {
>   	.has_3d_merge = true,
>   	.max_linewidth = 5120,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm8250_dpu_caps = {
> @@ -417,6 +433,8 @@ static const struct dpu_caps sm8250_dpu_caps = {
>   	.has_3d_merge = true,
>   	.max_linewidth = 900,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm8350_dpu_caps = {
> @@ -430,6 +448,8 @@ static const struct dpu_caps sm8350_dpu_caps = {
>   	.has_3d_merge = true,
>   	.max_linewidth = 4096,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm8450_dpu_caps = {
> @@ -443,6 +463,8 @@ static const struct dpu_caps sm8450_dpu_caps = {
>   	.has_3d_merge = true,
>   	.max_linewidth = 5120,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sm8550_dpu_caps = {
> @@ -456,6 +478,8 @@ static const struct dpu_caps sm8550_dpu_caps = {
>   	.has_3d_merge = true,
>   	.max_linewidth = 5120,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_caps sc7280_dpu_caps = {
> @@ -467,6 +491,8 @@ static const struct dpu_caps sc7280_dpu_caps = {
>   	.has_idle_pc = true,
>   	.max_linewidth = 2400,
>   	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>   };
>   
>   static const struct dpu_mdp_cfg msm8998_mdp[] = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 89b372cdca92..4847aae78db2 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -404,6 +404,8 @@ struct dpu_rotation_cfg {
>    * @pixel_ram_size     size of latency hiding and de-tiling buffer in bytes
>    * @max_hdeci_exp      max horizontal decimation supported (max is 2^value)
>    * @max_vdeci_exp      max vertical decimation supported (max is 2^value)
> + * @format_list: Pointer to list of supported formats
> + * @num_formats: Number of supported formats
>    */
>   struct dpu_caps {
>   	u32 max_mixer_width;
> @@ -419,6 +421,8 @@ struct dpu_caps {
>   	u32 pixel_ram_size;
>   	u32 max_hdeci_exp;
>   	u32 max_vdeci_exp;
> +	const u32 *format_list;
> +	u32 num_formats;
>   };
>   
>   /**


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