[PATCH] accel/ivpu: Extend address range for MMU mmap
Stanislaw Gruszka
stanislaw.gruszka at linux.intel.com
Thu Oct 19 06:05:11 UTC 2023
On Wed, Oct 18, 2023 at 01:01:13PM +0200, Stanislaw Gruszka wrote:
> From: "Wludzik, Jozef" <jozef.wludzik at intel.com>
>
> Allow to use whole address range in MMU context mmap which is up to 48
> bits. Return invalid argument from MMU context mmap in case address is
> not aligned to MMU page size, address is below MMU page size or address
> is greater then 47 bits.
>
> This fixes problem disallowing to run large models on VPU4
>
> Signed-off-by: Wludzik, Jozef <jozef.wludzik at intel.com>
> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
Applied to drm-misc-fixes
Thanks
Stanislaw
> ---
> drivers/accel/ivpu/ivpu_mmu_context.c | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_mmu_context.c b/drivers/accel/ivpu/ivpu_mmu_context.c
> index 0c8c65351919..c1050a2df954 100644
> --- a/drivers/accel/ivpu/ivpu_mmu_context.c
> +++ b/drivers/accel/ivpu/ivpu_mmu_context.c
> @@ -11,6 +11,7 @@
> #include "ivpu_mmu.h"
> #include "ivpu_mmu_context.h"
>
> +#define IVPU_MMU_VPU_ADDRESS_MASK GENMASK(47, 12)
> #define IVPU_MMU_PGD_INDEX_MASK GENMASK(47, 39)
> #define IVPU_MMU_PUD_INDEX_MASK GENMASK(38, 30)
> #define IVPU_MMU_PMD_INDEX_MASK GENMASK(29, 21)
> @@ -328,12 +329,8 @@ ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,
>
> if (!IS_ALIGNED(vpu_addr, IVPU_MMU_PAGE_SIZE))
> return -EINVAL;
> - /*
> - * VPU is only 32 bit, but DMA engine is 38 bit
> - * Ranges < 2 GB are reserved for VPU internal registers
> - * Limit range to 8 GB
> - */
> - if (vpu_addr < SZ_2G || vpu_addr > SZ_8G)
> +
> + if (vpu_addr & ~IVPU_MMU_VPU_ADDRESS_MASK)
> return -EINVAL;
>
> prot = IVPU_MMU_ENTRY_MAPPED;
> --
> 2.25.1
>
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