[PATCH 6/8] accel/ivpu: Make DMA allocations for MMU600 write combined
Jeffrey Hugo
quic_jhugo at quicinc.com
Mon Oct 30 15:08:44 UTC 2023
On 10/28/2023 9:59 AM, Stanislaw Gruszka wrote:
> From: Karol Wachowski <karol.wachowski at linux.intel.com>
>
> Previously using dma_alloc_wc() API we created cache coherent
> (mapped as write-back) mappings.
>
> Because we disable MMU600 snooping it was required to do costly
> page walk and cache flushes after each page table modification.
>
> With write-combined buffers it's possible to do a single write memory
> barrier to flush write-combined buffer to memory which simplifies the
> driver and significantly reduce time of map/unmap operations.
>
> Mapping time of 255 MB is reduced from 2.5 ms to 500 us.
>
> Signed-off-by: Karol Wachowski <karol.wachowski at linux.intel.com>
> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo at quicinc.com>
More information about the dri-devel
mailing list