[PATCH v2 6/6] accel/ivpu: Use cached buffers for FW loading

[Jeffrey Hugo]

On 9/26/2023 6:09 AM, Stanislaw Gruszka wrote:
> From: Karol Wachowski <karol.wachowski at linux.intel.com>
> 
> Create buffers with cache coherency on the CPU side (write-back) while
> disabling snooping on the VPU side. These buffers require an explicit
> cache flush after each CPU-side modification.
> 
> Configuring pages as write-combined may introduce significant delays,
> potentially taking hundreds of milliseconds for 64 MB buffers.
> 
> Added internal DRM_IVPU_BO_NOSNOOP mask which disables snooping on the
> VPU side. Allocate FW runtime memory buffer (64 MB) as cached with
> snooping-disabled.
> 
> This fixes random long FW loading times and boot params memory
> corruption on warmboot (due to missed wmb).
> 
> Fixes: 02d5b0aacd05 ("accel/ivpu: Implement firmware parsing and booting")
> Signed-off-by: Karol Wachowski <karol.wachowski at linux.intel.com>
> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka at linux.intel.com>

Reviewed-by: Jeffrey Hugo <quic_jhugo at quicinc.com>