[PATCH] drm/i915: Don't set PIPE_CONTROL_FLUSH_L3 for aux inval

Andi Shyti andi.shyti at linux.intel.com
Tue Sep 26 19:55:04 UTC 2023


Hi Nirmoy,

...

> > PIPE_CONTROL_FLUSH_L3 is not needed for aux invalidation
> > so don't set that.
> > 
> > Fixes: 78a6ccd65fa3 ("drm/i915/gt: Ensure memory quiesced before invalidation")
> > Cc: Jonathan Cavitt <jonathan.cavitt at intel.com>
> > Cc: Andi Shyti <andi.shyti at linux.intel.com>
> > Cc: <stable at vger.kernel.org> # v5.8+
> > Cc: Andrzej Hajda <andrzej.hajda at intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Cc: Tejas Upadhyay <tejas.upadhyay at intel.com>
> > Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> > Cc: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
> > Cc: Tapani Pälli <tapani.palli at intel.com>
> > Cc: Mark Janes <mark.janes at intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
> 
> looks better :)

this was supposed to be:

Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com> 

Andi


More information about the dri-devel mailing list