[PATCH v3 2/9] drm: xlnx: zynqmp_dpsub: Update live format defines

[Klymenko, Anatoliy]

> -----Original Message-----
> From: Tomi Valkeinen <tomi.valkeinen at ideasonboard.com>
> Sent: Friday, April 5, 2024 5:10 AM
> To: Klymenko, Anatoliy <Anatoliy.Klymenko at amd.com>
> Cc: dri-devel at lists.freedesktop.org; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org; devicetree at vger.kernel.org; linux-
> media at vger.kernel.org; Laurent Pinchart
> <laurent.pinchart at ideasonboard.com>; Maarten Lankhorst
> <maarten.lankhorst at linux.intel.com>; Maxime Ripard
> <mripard at kernel.org>; Thomas Zimmermann <tzimmermann at suse.de>;
> David Airlie <airlied at gmail.com>; Daniel Vetter <daniel at ffwll.ch>;
> Simek, Michal <michal.simek at amd.com>; Andrzej Hajda
> <andrzej.hajda at intel.com>; Neil Armstrong
> <neil.armstrong at linaro.org>; Robert Foss <rfoss at kernel.org>; Jonas
> Karlman <jonas at kwiboo.se>; Jernej Skrabec
> <jernej.skrabec at gmail.com>; Rob Herring <robh+dt at kernel.org>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Conor Dooley
> <conor+dt at kernel.org>; Mauro Carvalho Chehab
> <mchehab at kernel.org>
> Subject: Re: [PATCH v3 2/9] drm: xlnx: zynqmp_dpsub: Update live format
> defines
> 
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> 
> 
> On 21/03/2024 22:43, Anatoliy Klymenko wrote:
> > Update live format defines to match DPSUB AV_BUF_LIVE_VID_CONFIG
> register
> > layout.
> 
> I think this description needs a bit more. Mention that the defines are
> not currently used,  so we can change them like this without any other
> change.
> 

Makes sense. I'll update this.

>   Tomi
> 
> > Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko at amd.com>
> > ---
> >   drivers/gpu/drm/xlnx/zynqmp_disp_regs.h | 8 ++++----
> >   1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h
> b/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h
> > index f92a006d5070..fa3935384834 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp_regs.h
> > @@ -165,10 +165,10 @@
> >   #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_10               0x2
> >   #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_12               0x3
> >   #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_MASK
> GENMASK(2, 0)
> > -#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB               0x0
> > -#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV444    0x1
> > -#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422    0x2
> > -#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YONLY     0x3
> > +#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB               (0x0
> << 4)
> > +#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV444    (0x1 <<
> 4)
> > +#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422    (0x2 <<
> 4)
> > +#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YONLY     (0x3 <<
> 4)
> >   #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_MASK
> GENMASK(5, 4)
> >   #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_CB_FIRST             BIT(8)
> >   #define ZYNQMP_DISP_AV_BUF_PALETTE_MEMORY           0x400
> >