[PATCH v2 18/18] arm64: dts: mediatek: add display support for mt8365-evk
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Wed Apr 17 10:27:57 UTC 2024
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
> MIPI DSI:
> - Add "vsys_lcm_reg" regulator support and setup the "mt6357_vsim1_reg",
> to power the pannel plugged to the DSI connector.
> - Setup the Display Parallel Interface.
> - Add the startek kd070fhfid015 pannel support.
>
> HDMI:
> - Add HDMI connector support.
> - Add the "ite,it66121" HDMI bridge support, driven by I2C1.
> - Setup the Display Parallel Interface.
>
> Signed-off-by: Alexandre Mergnat <amergnat at baylibre.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 182 ++++++++++++++++++++++++++++
> 1 file changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> index 50cbaefa1a99..4afdcbefc481 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> @@ -26,6 +26,18 @@ chosen {
> stdout-path = "serial0:921600n8";
> };
>
> + connector {
> + compatible = "hdmi-connector";
> + label = "hdmi";
> + type = "d";
> +
> + port {
> + hdmi_connector_in: endpoint {
> + remote-endpoint = <&hdmi_connector_out>;
> + };
> + };
> + };
> +
> firmware {
> optee {
> compatible = "linaro,optee-tz";
> @@ -86,6 +98,56 @@ optee_reserved: optee at 43200000 {
> reg = <0 0x43200000 0 0x00c00000>;
> };
> };
> +
> + vsys_lcm_reg: regulator-vsys-lcm {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&pio 129 GPIO_ACTIVE_HIGH>;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <5000000>;
> + regulator-name = "vsys_lcm";
> + };
> +};
> +
> +&dpi0 {
> + pinctrl-0 = <&dpi_default_pins>;
> + pinctrl-1 = <&dpi_idle_pins>;
> + pinctrl-names = "default", "sleep";
> + status = "okay";
> +
> + port {
> + dpi_out: endpoint {
> + remote-endpoint = <&it66121_in>;
> + };
> + };
> +};
> +
> +&dsi0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + panel at 0 {
> + compatible = "startek,kd070fhfid015";
> + status = "okay";
status is always okay, unless it's disabled.
> + reg = <0>;
> + enable-gpios = <&pio 67 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
> + iovcc-supply = <&mt6357_vsim1_reg>;
> + power-supply = <&vsys_lcm_reg>;
> +
> + port {
> + panel_in: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +
> + port {
> + dsi_out: endpoint {
> + remote-endpoint = <&panel_in>;
> + };
> + };
> };
>
> &cpu0 {
> @@ -138,6 +200,50 @@ &i2c0 {
> status = "okay";
> };
>
> +&i2c1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-div = <2>;
> + clock-frequency = <100000>;
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + it66121hdmitx: it66121hdmitx at 4c {
Can we please get an actually readable name for this node?
Just a suggestion (you're free to rename however you want)
it66121_hdmi: hdmi at 4c {
> + #sound-dai-cells = <0>;
> + compatible = "ite,it66121";
> + interrupt-parent = <&pio>;
> + interrupts = <68 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&ite_pins>;
> + pinctrl-names = "default";
> + reg = <0x4c>;
> + reset-gpios = <&pio 69 GPIO_ACTIVE_LOW>;
> + vcn18-supply = <&mt6357_vsim2_reg>;
> + vcn33-supply = <&mt6357_vibr_reg>;
> + vrf12-supply = <&mt6357_vrf12_reg>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + it66121_in: endpoint {
> + bus-width = <12>;
> + remote-endpoint = <&dpi_out>;
> + };
> + };
> +
> + port at 1 {
> + reg = <1>;
> + hdmi_connector_out: endpoint {
> + remote-endpoint = <&hdmi_connector_in>;
> + };
> + };
> + };
> + };
> +};
> +
> &mmc0 {
> assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;
> assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
> @@ -180,7 +286,55 @@ &mt6357_pmic {
> #interrupt-cells = <2>;
> };
>
> +&mt6357_vsim1_reg {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +};
> +
> &pio {
> + dpi_default_pins: dpi-default-pins {
> + pins {
> + pinmux = <MT8365_PIN_0_GPIO0__FUNC_DPI_D0>,
> + <MT8365_PIN_1_GPIO1__FUNC_DPI_D1>,
> + <MT8365_PIN_2_GPIO2__FUNC_DPI_D2>,
> + <MT8365_PIN_3_GPIO3__FUNC_DPI_D3>,
> + <MT8365_PIN_4_GPIO4__FUNC_DPI_D4>,
> + <MT8365_PIN_5_GPIO5__FUNC_DPI_D5>,
> + <MT8365_PIN_6_GPIO6__FUNC_DPI_D6>,
> + <MT8365_PIN_7_GPIO7__FUNC_DPI_D7>,
> + <MT8365_PIN_8_GPIO8__FUNC_DPI_D8>,
> + <MT8365_PIN_9_GPIO9__FUNC_DPI_D9>,
> + <MT8365_PIN_10_GPIO10__FUNC_DPI_D10>,
> + <MT8365_PIN_11_GPIO11__FUNC_DPI_D11>,
> + <MT8365_PIN_12_GPIO12__FUNC_DPI_DE>,
> + <MT8365_PIN_13_GPIO13__FUNC_DPI_VSYNC>,
> + <MT8365_PIN_14_GPIO14__FUNC_DPI_CK>,
> + <MT8365_PIN_15_GPIO15__FUNC_DPI_HSYNC>;
> + drive-strength = <MTK_DRIVE_4mA>;
drive-strength = <4> is just fine....! :-)
> + };
> + };
> +
> + dpi_idle_pins: dpi-idle-pins {
> + pins {
> + pinmux = <MT8365_PIN_0_GPIO0__FUNC_GPIO0>,
> + <MT8365_PIN_1_GPIO1__FUNC_GPIO1>,
> + <MT8365_PIN_2_GPIO2__FUNC_GPIO2>,
> + <MT8365_PIN_3_GPIO3__FUNC_GPIO3>,
> + <MT8365_PIN_4_GPIO4__FUNC_GPIO4>,
> + <MT8365_PIN_5_GPIO5__FUNC_GPIO5>,
> + <MT8365_PIN_6_GPIO6__FUNC_GPIO6>,
> + <MT8365_PIN_7_GPIO7__FUNC_GPIO7>,
> + <MT8365_PIN_8_GPIO8__FUNC_GPIO8>,
> + <MT8365_PIN_9_GPIO9__FUNC_GPIO9>,
> + <MT8365_PIN_10_GPIO10__FUNC_GPIO10>,
> + <MT8365_PIN_11_GPIO11__FUNC_GPIO11>,
> + <MT8365_PIN_12_GPIO12__FUNC_GPIO12>,
> + <MT8365_PIN_13_GPIO13__FUNC_GPIO13>,
> + <MT8365_PIN_14_GPIO14__FUNC_GPIO14>,
> + <MT8365_PIN_15_GPIO15__FUNC_GPIO15>;
> + };
> + };
> +
> ethernet_pins: ethernet-pins {
> phy_reset_pins {
> pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>;
> @@ -222,6 +376,34 @@ pins {
> };
> };
>
> + i2c1_pins: i2c1-pins {
> + pins {
> + pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>,
> + <MT8365_PIN_60_SCL1__FUNC_SCL1_0>;
> + bias-pull-up;
> + };
> + };
> +
> + ite_pins: ite-pins {
> +
extra blank line, please remove.
> + irq_ite_pins {
Did you run dtbs_check?!? :-)
Cheers,
Angelo
> + pinmux = <MT8365_PIN_68_CMDAT0__FUNC_GPIO68>;
> + input-enable;
> + bias-pull-up;
> + };
> +
> + pwr_pins {
> + pinmux = <MT8365_PIN_70_CMDAT2__FUNC_GPIO70>,
> + <MT8365_PIN_71_CMDAT3__FUNC_GPIO71>;
> + output-high;
> + };
> +
> + rst_ite_pins {
> + pinmux = <MT8365_PIN_69_CMDAT1__FUNC_GPIO69>;
> + output-high;
> + };
> + };
> +
> mmc0_default_pins: mmc0-default-pins {
> clk-pins {
> pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>;
>
More information about the dri-devel
mailing list