[PATCH v3 22/26] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support

[Chen-Yu Tsai]

On Sun, Aug 18, 2024 at 7:08 AM Ryan Walklin <ryan at testtoast.com> wrote:
>
> From: Jernej Skrabec <jernej.skrabec at gmail.com>
>
> The DE33 is a newer version of the Allwinner Display Engine IP block,
> found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
> supported by the mainline driver.
>
> The DE33 in the H616 has mixer0 and writeback units. The clocks
> and resets required are identical to the H3 and H5 respectively, so use
> those existing structs for the H616 description.
>
> There are two additional 32-bit registers (at offsets 0x24 and 0x28)
> which require clearing and setting respectively to bring up the
> hardware. The function of these registers is currently unknown, and the
> values are taken from the out-of-tree driver.
>
> Add the required clock description struct and compatible string to the
> DE2 driver.
>
> Signed-off-by: Ryan Walklin <ryan at testtoast.com>
>
> --
> Changelog v2..v3:
> - Lowercase hex value
> - Correct #include for writel()
> ---
>  drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> index 7683ea08d8e30..e0fdf9bda10b1 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> @@ -7,6 +7,7 @@
>  #include <linux/clk-provider.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
> +#include <linux/of_address.h>

Still incorrect.

>  #include <linux/platform_device.h>
>  #include <linux/reset.h>
>
> @@ -239,6 +240,16 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = {
>         .num_resets     = ARRAY_SIZE(sun50i_h5_de2_resets),
>  };
>
> +static const struct sunxi_ccu_desc sun50i_h616_de33_clk_desc = {
> +       .ccu_clks       = sun8i_de2_ccu_clks,
> +       .num_ccu_clks   = ARRAY_SIZE(sun8i_de2_ccu_clks),
> +
> +       .hw_clks        = &sun8i_h3_de2_hw_clks,
> +
> +       .resets         = sun50i_h5_de2_resets,
> +       .num_resets     = ARRAY_SIZE(sun50i_h5_de2_resets),
> +};
> +
>  static int sunxi_de2_clk_probe(struct platform_device *pdev)
>  {
>         struct clk *bus_clk, *mod_clk;
> @@ -290,6 +301,16 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev)
>                         "Couldn't deassert reset control: %d\n", ret);
>                 goto err_disable_mod_clk;
>         }
> +
> +       /*
> +        * The DE33 requires these additional (unknown) registers set
> +        * during initialisation.
> +        */
> +       if (of_device_is_compatible(pdev->dev.of_node,
> +                                   "allwinner,sun50i-h616-de33-clk")) {
> +               writel(0, reg + 0x24);
> +               writel(0x0000a980, reg + 0x28);
> +       }
>
>         ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc);
>         if (ret)
> @@ -335,6 +356,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = {
>                 .compatible = "allwinner,sun50i-h6-de3-clk",
>                 .data = &sun50i_h5_de2_clk_desc,
>         },
> +       {
> +               .compatible = "allwinner,sun50i-h616-de33-clk",
> +               .data = &sun50i_h616_de33_clk_desc,
> +       },
>         { }
>  };
>  MODULE_DEVICE_TABLE(of, sunxi_de2_clk_ids);
> --
> 2.46.0
>