[PATCH 08/21] drm/msm/dpu: add CWB entry to catalog for SM8650

Dmitry Baryshkov dmitry.baryshkov at linaro.org
Fri Aug 30 17:13:17 UTC 2024


On Thu, Aug 29, 2024 at 01:48:29PM GMT, Jessica Zhang wrote:
> From: Esha Bharadwaj <quic_ebharadw at quicinc.com>
> 
> Add new block for concurrent writeback mux to HW catalog and change
> pingpong index names to distinguish between general use pingpong blocks
> and pingpong blocks dedicated for concurrent writeback

Please split into two commits.

> 
> Signed-off-by: Esha Bharadwaj <quic_ebharadw at quicinc.com>
> Signed-off-by: Jessica Zhang <quic_jesszhan at quicinc.com>
> ---
>  .../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h    | 29 +++++++++++++++++++---
>  .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h |  4 +--
>  .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h |  4 +--
>  .../drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h   |  4 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     | 13 ++++++++++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h        |  8 +++---
>  6 files changed, 48 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> index eb5dfff2ec4f..ce2773029763 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
> @@ -252,25 +252,25 @@ static const struct dpu_pingpong_cfg sm8650_pp[] = {
>  		.merge_3d = MERGE_3D_2,
>  		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 31),
>  	}, {
> -		.name = "pingpong_6", .id = PINGPONG_6,
> +		.name = "pingpong_6", .id = PINGPONG_CWB_0,

Should we also rename such blocks?

>  		.base = 0x66000, .len = 0,
>  		.features = BIT(DPU_PINGPONG_DITHER),
>  		.sblk = &sc7280_pp_sblk,
>  		.merge_3d = MERGE_3D_3,


-- 
With best wishes
Dmitry


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