[PATCH v2] drm: bridge: fsl-ldb: fixup mode on freq mismatch

[Miquel Raynal]

Hi Nikolaus,

On 03/12/2024 at 20:09:52 +01, Nikolaus Voss <nv at vosn.de> wrote:

> LDB clock has to be a fixed multiple of the pixel clock.

Not only, IIUC it also needs to be synchronized, ie. share the same
source.

> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp),

Wait, what? I am sorry but that is not at all recommended, both should
come from video_pll1 which the de-facto versatile PLL to use, no? Am I
missing something here?

> this constraint cannot be satisfied for
> any pixel clock, which leads to flickering and incomplete
> lines on the attached display.
>
> To overcome this, check this condition in .atomic_check() and
> adapt the pixel clock accordingly.
>
> Cc: <stable at vger.kernel.org>
> Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge")
>

Nit: No \n here.

> Signed-off-by: Nikolaus Voss <nv at vosn.de>

Thanks,
Miquèl