[PATCH v2 19/23] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
Stephen Boyd
sboyd at kernel.org
Wed Jul 3 23:02:15 UTC 2024
Quoting Ryan Walklin (2024-07-03 03:51:09)
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> index b0b8dba239aec..36b9eadb80bb5 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> @@ -7,6 +7,7 @@
> #include <linux/clk-provider.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
What is this include for?
> #include <linux/platform_device.h>
> #include <linux/reset.h>
>
> @@ -290,6 +301,16 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev)
> "Couldn't deassert reset control: %d\n", ret);
> goto err_disable_mod_clk;
> }
> +
> + /*
> + * The DE33 requires these additional (unknown) registers set
> + * during initialisation.
> + */
> + if (of_device_is_compatible(pdev->dev.of_node,
> + "allwinner,sun50i-h616-de33-clk")) {
> + writel(0, reg + 0x24);
> + writel(0x0000A980, reg + 0x28);
Lowercase hex please. Did the downstream driver have names for these
register offsets by way of some sort of #define?
> + }
>
> ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc);
> if (ret)
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