[PATCH v5 02/16] drm/msm/dpu: fix error condition in dpu_encoder_virt_atomic_mode_set
Abhinav Kumar
quic_abhinavk at quicinc.com
Fri Jul 12 19:41:38 UTC 2024
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
> The commit b954fa6baaca ("drm/msm/dpu: Refactor rm iterator") removed
> zero-init of the hw_ctl array, but didn't change the error condition,
> that checked for hw_ctl[i] being NULL. Use indices check instead.
>
> Fixes: b954fa6baaca ("drm/msm/dpu: Refactor rm iterator")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 5d205e09cf45..7613005fbfea 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1186,7 +1186,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
> return;
> }
>
> - if (!hw_ctl[i]) {
> + if (i >= num_ctl) {
This is not very clear to me.
How will we hit this condition? I dont see i going beyond 1 in this loop
and neither should num_ctl
Will it be just easier to bring back the NULL assignment at the top?
struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC] = { NULL };
I also see the same issue for other blocks such as hw_dsc, hw_lm
> DPU_ERROR_ENC(dpu_enc,
> "no ctl block assigned at idx: %d\n", i);
> return;
>
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