[PATCH v2 1/2] drm/msm/a6xx: Add A642L speedbin (0x81)
Danila Tikhonov
danila at jiaxyga.com
Wed Jul 31 18:45:49 UTC 2024
From: Eugene Lepshy <fekz115 at gmail.com>
According to downstream, A642L's speedbin is 129 and uses 4 as index
Signed-off-by: Eugene Lepshy <fekz115 at gmail.com>
Signed-off-by: Danila Tikhonov <danila at jiaxyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio at linaro.org>
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index 68ba9aed5506..99f0ee1a2ede 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = {
.speedbins = ADRENO_SPEEDBINS(
{ 0, 0 },
{ 117, 0 },
+ { 129, 4 },
{ 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */
{ 190, 1 },
),
--
2.45.2
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