[PATCH 1/7] dt-bindings: display/msm/dsi: allow specifying TE source

Krzysztof Kozlowski krzk at kernel.org
Wed Jun 5 06:58:55 UTC 2024


On 04/06/2024 19:52, Abhinav Kumar wrote:
> 
> 
> On 6/4/2024 8:36 AM, Krzysztof Kozlowski wrote:
>> On 04/06/2024 17:32, Dmitry Baryshkov wrote:
>>> On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
>>>> On 04/06/2024 17:14, Dmitry Baryshkov wrote:
>>>>>>>>>>
>>>>>>>>>> I didnt follow why this is a link property. Sorry , I didnt follow the
>>>>>>>>>> split part.
>>>>>>>>>
>>>>>>>>> There is a link between the DSI host and the panel. I don't want to
>>>>>>>>> end up in a situation when the properties of the link are split
>>>>>>>>> between two different nodes.
>>>>>>>>>
>>>>>>>>
>>>>>>>> It really depends on what the property denotes. I do not think this
>>>>>>>> should be the reason to do it this way.
>>>>>>>
>>>>>>> It denotes how the panel signals DPU that it finished processing the
>>>>>>> data (please excuse me for possibly inaccurate description). However
>>>>>>> there is no direct link between the panel and the DPU. So we should be
>>>>>>> using a link between DSI host and the panel.
>>>>>>>
>>>>>>
>>>>>> Yes, I totally agree that we should be using a link between DSI host and the
>>>>>> panel.
>>>>>>
>>>>>> My question from the beginning has been why the output port?
>>>>>>
>>>>>> It looks like to me we need to have another input port to the controller
>>>>>> then?
>>>>>>
>>>>>> One from DPU and the other from panel?
>>>>>
>>>>> Dear DT maintainers, could you please comment on the OF graph entries?
>>>>> Are they considered to be unidirectional or bidirectional?
>>>>>
>>>>> Would you suggest adding another arc to the OF graph in our case or is
>>>>> it fine to have a signal generated by the panel in the 'panel_in' port?
>>>>
>>>> Which pin are we talking about? DSI or panel? Commit msg suggests DSI,
>>>> so property is in DSI node part. Seems logical to me.
>>>
>>> Input pin on the DSI side.
>>
>> So adding it to panel schema is not even possible thus I am not sure if
>> we discuss this option (maybe not, because it would be odd, considering
>> you got Rb tag!).
>>
>> Adding some input node to DSI connecting panel output and DSI input...
>> for what? I mean, what sort of data would it represent?
>>
> 
> TE pin is an input signal from the panel to the DSI host.
> 
> Today we have two ports in the DSI host node:
> 
> 1) input to DSI node from DPU. This represents the pixel stream from DPU 
> to DSI
> 
> 2) DSI output node to represent pixel stream from DSI host to panel in
> 
> Now, please explain to me how does TE pin belongs to (2) because thats 
> where this property has been added.

Don't get what is a DPU, but anyway connections are kind of
bi-directional. So TE belongs there because this is the connection
between the DSI and the panel, with generic meaning that data flows from
the DSI to the panel.

Why we keep discussing this? You really need 3rd ack or this is just
bikeschedding?

Best regards,
Krzysztof



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