[PATCH v2 0/2] SN65DSI86 minor fixes
Jayesh Choudhary
j-choudhary at ti.com
Tue Jun 18 08:14:16 UTC 2024
Hello All,
These 2 patches add the atomic check hook for sn65dsi86 bridge and
does a minor math fix for dsi rate calculation.
According to the datasheet[0], for the max resolution, it says:
Suitable for 60 fps 4K 4096 x 2304 resolution at 18
bpp color, and WUXGA 1920 x 1200 resolution
with 3D graphics at 60 fps (120 fps equivalent)
A very usual clock frequency for 4K at 60fps resolution is 594MHz.
So keeping the max value supported by the bridge as 600MHz for
safe check.
DSI clock frequency range check are as per datasheet[0].
Changelog v1->v2:
- Check the value in atomic_check hook
- Fix the "Fixes" tag
- Fix MAX_DSI_CLK_RANGE to reflect actual supported value
- Add mode_clock check to ensure that the bit_rate_khz variable
does not overflow instead of justifying by reverse calculation
in comments.
- Fix commit message to show that the math uissue was found during
code inspection.
v1 patch:
<https://lore.kernel.org/all/20240408073623.186489-1-j-choudhary@ti.com/>
[0]: <https://www.ti.com/lit/gpn/sn65dsi86>
Jayesh Choudhary (2):
drm/bridge: ti-sn65dsi86: Add atomic_check hook for the bridge
drm/bridge: ti-sn65dsi86: Fix ti_sn_bridge_set_dsi_rate function
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 67 +++++++++++++++++++--------
1 file changed, 47 insertions(+), 20 deletions(-)
--
2.25.1
More information about the dri-devel
mailing list