[PATCH v3 4/5] drm/msm/adreno: Move hwcg table into a6xx specific info

[Rob Clark]

On Tue, Jun 18, 2024 at 1:30 AM Dmitry Baryshkov
<dmitry.baryshkov at linaro.org> wrote:
>
> On Mon, Jun 17, 2024 at 03:51:14PM GMT, Rob Clark wrote:
> > From: Rob Clark <robdclark at chromium.org>
> >
> > Introduce a6xx_info where we can stash gen specific stuff without
> > polluting the toplevel adreno_info struct.
> >
> > Signed-off-by: Rob Clark <robdclark at chromium.org>
> > ---
> >  drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 65 +++++++++++++++++------
> >  drivers/gpu/drm/msm/adreno/a6xx_gpu.c     |  6 +--
> >  drivers/gpu/drm/msm/adreno/a6xx_gpu.h     |  9 ++++
> >  drivers/gpu/drm/msm/adreno/adreno_gpu.h   |  6 ++-
> >  4 files changed, 67 insertions(+), 19 deletions(-)
> >
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>
>
> > @@ -98,7 +100,9 @@ struct adreno_info {
> >       struct msm_gpu *(*init)(struct drm_device *dev);
> >       const char *zapfw;
> >       u32 inactive_period;
> > -     const struct adreno_reglist *hwcg;
> > +     union {
> > +             const struct a6xx_info *a6xx;
> > +     };
> >       u64 address_space_size;
> >       /**
> >        * @speedbins: Optional table of fuse to speedbin mappings
>
> My preference would be towards wrapping the adreno_gpu, but that would
> require more significant rework of the driver. Let's see if we can get
> to that later.
>

yeah, it was going to be more re-work, and I'm neck deep in
gpuvm/vm_bind.. I just wanted to land this since it is a pita (and
error prone) to rebase as more gpu's get added ;-)

It isn't entirely unlike how we handle gpu gen specific options in
mesa, where we have a somewhat bigger set of options, so I wouldn't
say that this approach was worse than extending adreno_info.. just
different..

BR,
-R