[PATCH RFC v2] drm/msm/dpu: Configure DP INTF/PHY selector

Abhinav Kumar quic_abhinavk at quicinc.com
Tue Jun 25 20:21:09 UTC 2024



On 6/25/2024 1:20 PM, Dmitry Baryshkov wrote:
> On Tue, 25 Jun 2024 at 22:28, Abhinav Kumar <quic_abhinavk at quicinc.com> wrote:
>>
>>
>>
>> On 6/25/2024 12:26 PM, Abhinav Kumar wrote:
>>>
>>>
>>> On 6/24/2024 6:39 PM, Abhinav Kumar wrote:
>>>>
>>>>
>>>> On 6/13/2024 4:17 AM, Dmitry Baryshkov wrote:
>>>>> From: Bjorn Andersson <andersson at kernel.org>
>>>>>
>>>>> Some platforms provides a mechanism for configuring the mapping between
>>>>> (one or two) DisplayPort intfs and their PHYs.
>>>>>
>>>>> In particular SC8180X provides this functionality, without a default
>>>>> configuration, resulting in no connection between its two external
>>>>> DisplayPort controllers and any PHYs.
>>>>>
>>>>
>>>> I have to cross-check internally about what makes it mandatory to
>>>> program this only for sc8180xp. We were not programming this so far
>>>> for any chipset and this register is present all the way from sm8150
>>>> till xe10100 and all the chipsets do not have a correct default value
>>>> which makes me think whether this is required to be programmed.
>>>>
>>>> Will update this thread once I do.
>>>>
>>>
>>> Ok, I checked more. The reason this is mandatory for sc8180xp is the
>>> number of controllers is greater than number of PHYs needing this to be
>>> programmed. On all other chipsets its a 1:1 mapping.
>>>
>>
>> Correction, number of controllers is < number of PHYs.
> 
> Thanks, I'll c&p your explanation to the commit message if you don't mind.
> 

Yes you can, pls go ahead.

>>
>>> I am fine with the change once the genmap comment is addressed.
> 


More information about the dri-devel mailing list