[PATCH 1/3] drm/etnaviv: move debug register en-/disable into own function

[Lucas Stach]

The next changes will introduce another place where the debug registers
need to be en-/disabled. Split into separate functions, so we don't need
to replicate the code there. Also allow those calls to nest, keeping
the debug registers enabled until all callers don't need them any longer.

Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 33 ++++++++++++++++++++-------
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h |  3 +++
 2 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 7c7f97793ddd..ade6f7554706 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -471,6 +471,29 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
 
 	etnaviv_hw_specs(gpu);
 }
+void etnaviv_gpu_enable_debug_regs(struct etnaviv_gpu *gpu)
+{
+	u32 val;
+
+	if (atomic_inc_return(&gpu->dbg_ref) > 1)
+		return;
+
+	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
+	val &= ~VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS;
+	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val);
+}
+
+void etnaviv_gpu_disable_debug_regs(struct etnaviv_gpu *gpu)
+{
+	u32 val;
+
+	if (atomic_dec_return(&gpu->dbg_ref) != 0)
+		return;
+
+	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
+	val |= VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS;
+	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val);
+}
 
 static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock)
 {
@@ -1335,10 +1358,7 @@ static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
 	val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
 	gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, val);
 
-	/* enable debug register */
-	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
-	val &= ~VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS;
-	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val);
+	etnaviv_gpu_enable_debug_regs(gpu);
 
 	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
 }
@@ -1358,10 +1378,7 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
 		*pmr->bo_vma = pmr->sequence;
 	}
 
-	/* disable debug register */
-	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
-	val |= VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS;
-	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val);
+	etnaviv_gpu_disable_debug_regs(gpu);
 
 	/* enable clock gating */
 	val = gpu_read_power(gpu, VIVS_PM_POWER_CONTROLS);
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 31322195b9e4..07a6c66e0005 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -116,6 +116,7 @@ struct etnaviv_gpu {
 	struct mutex sched_lock;
 	struct drm_gpu_scheduler sched;
 	enum etnaviv_gpu_state state;
+	atomic_t dbg_ref;
 
 	/* 'ring'-buffer: */
 	struct etnaviv_cmdbuf buffer;
@@ -222,6 +223,8 @@ int etnaviv_gpu_pm_get_sync(struct etnaviv_gpu *gpu);
 void etnaviv_gpu_pm_put(struct etnaviv_gpu *gpu);
 int etnaviv_gpu_wait_idle(struct etnaviv_gpu *gpu, unsigned int timeout_ms);
 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch);
+void etnaviv_gpu_enable_debug_regs(struct etnaviv_gpu *gpu);
+void etnaviv_gpu_disable_debug_regs(struct etnaviv_gpu *gpu);
 
 extern struct platform_driver etnaviv_gpu_driver;
 
-- 
2.39.2