STM32 DSI controller driver: mode_valid clock tolerance

[Sean Nyekjaer]

Hi Raphael,

> On 20 Mar 2024, at 15.14, Raphael Gallais-Pou <raphael.gallais-pou at foss.st.com> wrote:
> 
> 
> On 3/8/24 09:35, Sean Nyekjaer wrote:
>> Hi,
> 
> 
> Hi Sean,
> 
> 
> Sorry for not responding earlier.

NP :)

> 
> I've also added Antonio Borneo, which is the author of the implementation of the
> mode_valid() hook.
> 
>> I’m using a stm32mp157 with a sn65dsi83 DSI2LVDS bridge.
>> The LVDS display is having a minimum clock of 25.2 MHz, typical of 27,2 MHz and a max of 30,5 MHz.
>> 
>> I will fail the mode_valid check with MODE_CLOCK_RANGE.
>> It will request 27200000 Hz, but is getting 27250000. Guess the display is fine with this :)
>> 
>> In this case it seems a bit harsh to fail if the output clock isn’t within 50 Hz of the requested clock.
>> 
>> If HDMI is requiring a tolerance of 50 Hz, would it be better to do the check in the HDMI bridge driver?
> 
> At the time when the driver was implemented, a large set of TVs/HDMI panels were
> tested, and it was the 'optimal' parameter found, even if the value is quite
> restrictive.

Ok, let’s keep til 50Hz tolerance as a default.

> 
> As Maxime said earlier, it was also easier to implement this tolerance directly
> within the DSI driver, since only the display-controller and the driver itself
> have access to this clock.
> 
> 
> Eventually a device-tree parameter could be implemented, with default value to
> 50Hz, so that fine tuning can be done using other bridges.

It doesn’t look that difficult to add the tolerance as a device tree option.
Naming is always quite hard, could the name be st,clock_tolerance = <50>; ?

I can’t find other drivers that have this tolerance option nor have a device tree option.

/Sean