[PATCH 04/12] accel/ivpu: Implement support for preemption buffers

Jeffrey Hugo quic_jhugo at quicinc.com
Fri May 10 16:36:24 UTC 2024


On 5/8/2024 7:21 AM, Jacek Lawrynowicz wrote:
> From: "Wachowski, Karol" <karol.wachowski at intel.com>
> 
> Allocate per-context preemption buffers that are required by HWS.
> 
> There are two preemption buffers:
>    * primary - allocated in user memory range (PIOVA accessible)
>    * secondary - allocated in shave memory range
> 
> Signed-off-by: Wachowski, Karol <karol.wachowski at intel.com>
> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz at linux.intel.com>

Reviewed-by: Jeffrey Hugo <quic_jhugo at quicinc.com>


More information about the dri-devel mailing list