[PATCH 2/7] drm/msm/dpu: convert vsync source defines to the enum

[Abhinav Kumar]

On 5/22/2024 1:01 PM, Dmitry Baryshkov wrote:
> On Wed, 22 May 2024 at 21:41, Abhinav Kumar <quic_abhinavk at quicinc.com> wrote:
>>
>>
>>
>> On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
>>> Add enum dpu_vsync_source instead of a series of defines. Use this enum
>>> to pass vsync information.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>> ---
>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  2 +-
>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c |  2 +-
>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h |  2 +-
>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++++++++++------------
>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h  |  2 +-
>>>    5 files changed, 18 insertions(+), 16 deletions(-)
>>>
> 
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
>>> index 66759623fc42..a2eff36a2224 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
>>> @@ -54,18 +54,20 @@
>>>    #define DPU_BLEND_BG_INV_MOD_ALPHA  (1 << 12)
>>>    #define DPU_BLEND_BG_TRANSP_EN              (1 << 13)
>>>
>>> -#define DPU_VSYNC0_SOURCE_GPIO               0
>>> -#define DPU_VSYNC1_SOURCE_GPIO               1
>>> -#define DPU_VSYNC2_SOURCE_GPIO               2
>>> -#define DPU_VSYNC_SOURCE_INTF_0              3
>>> -#define DPU_VSYNC_SOURCE_INTF_1              4
>>> -#define DPU_VSYNC_SOURCE_INTF_2              5
>>> -#define DPU_VSYNC_SOURCE_INTF_3              6
>>> -#define DPU_VSYNC_SOURCE_WD_TIMER_4  11
>>> -#define DPU_VSYNC_SOURCE_WD_TIMER_3  12
>>> -#define DPU_VSYNC_SOURCE_WD_TIMER_2  13
>>> -#define DPU_VSYNC_SOURCE_WD_TIMER_1  14
>>> -#define DPU_VSYNC_SOURCE_WD_TIMER_0  15
>>> +enum dpu_vsync_source {
>>> +     DPU_VSYNC_SOURCE_GPIO_0,
>>> +     DPU_VSYNC_SOURCE_GPIO_1,
>>> +     DPU_VSYNC_SOURCE_GPIO_2,
>>> +     DPU_VSYNC_SOURCE_INTF_0 = 3,
>>
>> Do we need this assignment to 3?
> 
> It is redundant, but it points out that if at some point another GPIO
> is added, it should go to the end (or to some other place, having the
> proper value).
> 

Ack, makes sense.

>>
>> Rest LGTM,
>>
>> Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>
>