[PATCH] drm:sprd: Correct left shift operator evaluating constant expression

[Chunyan Zhang]

Hi Karan,

On Wed, 6 Nov 2024 at 02:19, Karan Sanghavi <karansanghvi98 at gmail.com> wrote:
>
> The left shift operation followed by a mask with 0xf will
> always result in 0. To correctly evaluate the expression for
> the bitwise OR operation, use a right shift instead.
>
> Reported by Coverity Scan CID: 1511468

Should we add a fixes tag, so that the patch can be backported to the
stable branches.

Apart from that, the patch looks good to me, so,

Reviewed-by: Chunyan Zhang <zhang.lyra at gmail.com>

Thanks,
Chunyan

>
> Signed-off-by: Karan Sanghavi <karansanghvi98 at gmail.com>
> ---
> Coverity Scan Message:
> CID 1511468: (#1 of 1): Wrong operator used (CONSTANT_EXPRESSION_RESULT)
> operator_confusion: (pll->kint << 4) & 15 is always 0 regardless of the
> values of its operands. This occurs as the bitwise second operand of "|"
> ---
>  drivers/gpu/drm/sprd/megacores_pll.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/sprd/megacores_pll.c b/drivers/gpu/drm/sprd/megacores_pll.c
> index 3091dfdc11e3..43c10a5fc441 100644
> --- a/drivers/gpu/drm/sprd/megacores_pll.c
> +++ b/drivers/gpu/drm/sprd/megacores_pll.c
> @@ -94,7 +94,7 @@ static void dphy_set_pll_reg(struct dphy_pll *pll, struct regmap *regmap)
>         reg_val[3] = pll->vco_band | (pll->sdm_en << 1) | (pll->refin << 2);
>         reg_val[4] = pll->kint >> 12;
>         reg_val[5] = pll->kint >> 4;
> -       reg_val[6] = pll->out_sel | ((pll->kint << 4) & 0xf);
> +       reg_val[6] = pll->out_sel | ((pll->kint >> 4) & 0xf);
>         reg_val[7] = 1 << 4;
>         reg_val[8] = pll->det_delay;
>
>
> ---
> base-commit: 81983758430957d9a5cb3333fe324fd70cf63e7e
> change-id: 20241105-coverity1511468wrongoperator-20130bcd4240
>
> Best regards,
> --
> Karan Sanghavi <karansanghvi98 at gmail.com>
>