[PATCH v2 04/11] drm/msm: adreno: add GMU_BW_VOTE feature flag

[Rob Clark]

On Thu, Nov 21, 2024 at 11:50 AM Rob Clark <robdclark at gmail.com> wrote:
>
> On Tue, Nov 19, 2024 at 9:56 AM Neil Armstrong
> <neil.armstrong at linaro.org> wrote:
> >
> > The Adreno GMU Management Unit (GNU) can also scale the DDR Bandwidth
>
> nit, s/GNU/GMU/

And I guess you meant "GPU Management Unit" (presumably this isn't yet
another recursive acronym

Same comment in the next commit

>
> > along the Frequency and Power Domain level, but by default we leave the
> > OPP core vote for the interconnect ddr path.
> >
> > While scaling via the interconnect path was sufficient, newer GPUs
> > like the A750 requires specific vote paremeters and bandwidth to
> > achieve full functionality.
> >
> > While the feature will require some data in a6xx_info, it's safer
> > to only enable tested platforms with this flag first.
> >
> > Add a new feature enabling DDR Bandwidth vote via GMU.
> >
> > Signed-off-by: Neil Armstrong <neil.armstrong at linaro.org>
> > ---
> >  drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> > index 4702d4cfca3b58fb3cbb25cb6805f1c19be2ebcb..394b96eb6c83354ae008b15b562bedb96cd391dd 100644
> > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> > @@ -58,6 +58,7 @@ enum adreno_family {
> >  #define ADRENO_FEAT_HAS_HW_APRIV               BIT(0)
> >  #define ADRENO_FEAT_HAS_CACHED_COHERENT                BIT(1)
> >  #define ADRENO_FEAT_PREEMPTION                 BIT(2)
> > +#define ADRENO_FEAT_GMU_BW_VOTE                        BIT(3)
> >
> >  /* Helper for formating the chip_id in the way that userspace tools like
> >   * crashdec expect.
> >
> > --
> > 2.34.1
> >