[PATCH 3/6] drm/exynos: exynos7_drm_decon: fix ideal_clk by converting it to Hz

[대인기/Tizen Platform Lab(SR)/삼성전자]

> -----Original Message-----
> From: Kaustabh Chakraborty <kauschluss at disroot.org>
> Sent: Friday, September 20, 2024 12:11 AM
> To: Inki Dae <inki.dae at samsung.com>; Seung-Woo Kim
> <sw0312.kim at samsung.com>; Kyungmin Park <kyungmin.park at samsung.com>; David
> Airlie <airlied at gmail.com>; Simona Vetter <simona at ffwll.ch>; Krzysztof
> Kozlowski <krzk at kernel.org>; Alim Akhtar <alim.akhtar at samsung.com>;
> Maarten Lankhorst <maarten.lankhorst at linux.intel.com>; Maxime Ripard
> <mripard at kernel.org>; Thomas Zimmermann <tzimmermann at suse.de>; Rob Herring
> <robh at kernel.org>; Conor Dooley <conor at kernel.org>
> Cc: dri-devel at lists.freedesktop.org; linux-arm-kernel at lists.infradead.org;
> linux-samsung-soc at vger.kernel.org; linux-kernel at vger.kernel.org;
> devicetree at vger.kernel.org; Kaustabh Chakraborty <kauschluss at disroot.org>
> Subject: [PATCH 3/6] drm/exynos: exynos7_drm_decon: fix ideal_clk by
> converting it to Hz
> 
> The clkdiv values are incorrect as ideal_clk is in kHz and the clock
> rate of vclk is in Hz. Multiply 1000 to ideal_clk to bring it to Hz.
> 
> Signed-off-by: Kaustabh Chakraborty <kauschluss at disroot.org>
> ---
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> index 2c4ee87ae6ec..4e4ced50ff15 100644
> --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> @@ -137,7 +137,7 @@ static void decon_ctx_remove(struct decon_context *ctx)
>  static u32 decon_calc_clkdiv(struct decon_context *ctx,
>  		const struct drm_display_mode *mode)
>  {
> -	unsigned long ideal_clk = mode->clock;
> +	unsigned long ideal_clk = mode->clock * 1000;

Right. ideal_clk should be fixed with Hz.

Thanks,
Inki Dae

>  	u32 clkdiv;
> 
>  	/* Find the clock divider value that gets us closest to ideal_clk
> */
> 
> --
> 2.46.1